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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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H8S2245 датащи(PDF) 170 Page - Renesas Technology Corp |
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H8S2245 датащи(HTML) 170 Page - Renesas Technology Corp |
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170 / 818 page  Section 5 Interrupt Controller Rev.3.00 Mar. 26, 2007 Page 128 of 772 REJ09B0355-0300 5.5.6 NMI Interrupt Usage Notes The NMI interrupt is part of the exception processing performed cooperatively by the LSI's internal interrupt controller and the CPU when the system is operating normally under the specified electrical conditions. No operations, including NMI interrupts, are guaranteed when operation is not normal (runaway status) due to software problems or abnormal input to the LSI's pins. In such cases, the LSI may be restored to the normal program execution state by applying an external reset. 5.6 DTC Activation by Interrupt 5.6.1 Overview The DTC can be activated by an interrupt. In this case, the following options are available: • Interrupt request to CPU • Activation request to DTC • Selection of a number of the above For details of interrupt requests that can be used with to activate the DTC, see section 7, Data Transfer Controller. |
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