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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M32C/8A датащи(PDF) 242 Page - Renesas Technology Corp |
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M32C/8A датащи(HTML) 242 Page - Renesas Technology Corp |
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242 / 372 page  M32C/8A Group 17. Serial Interfaces Rev.1.00 Jul 15, 2007 Page 225 of 352 REJ09B0385-0100 Figure 17.23 I2C Mode Block Diagram SDHI ALS ACKC 0 1 STSPSEL 0 1 Delay circuit D Q T UARTi transmit shift register Start condition detection Stop condition detection SDAi Select SDA output in Function Control Register SCLi Select SCL output in Function Control Register ACKD Noise filter Noise filter UARTi CLK control S Q R S Q R SWC SWC2 Falling edge of 9th bit Transmission control circuit UARTi transmit interrupt request NACK interrupt request DMA 0 to 3 request UARTi transmit shift register Start/stop condition detection interrupt request S Q R Reception control circuit UARTi receive interrupt request ACK interrupt request DMA 0 to 3 request D Q T 9th clock NACK ACK Logic 0 write signal to PDk_m Logic 1 write signal to PDk_m D Q T IICM2 = 1 IICM = 1 and IICM2 = 0 IICM = 0 or IICM2 = 1 IICM = 1 and IICM2 = 0 ABT BBS i = 0 to 4 IICM, BBS: bits in the UiSMR register IICM2, SWC, ALS, SWC2, SDHI: bits in the UiSMR2 register STSPSEL, ACKD, ACKC: bits in the UiSMR4 register NCH: bit in the UiC0 register ABT: UiRB register PDk_m: bit in the Port Pk Direction Register corresponding to the SCLi pin NOTE: 1. P7_0 and P7_1 do not have the dotted rectangular portion of the circuit. STSPSEL IICM 0 1 0 1 Start/stop condition generation block Falling edge detection NCH NCH (note 1) (note 1) |
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