M32CSLASH8A datasheet(232/372 Pages) RENESAS

232 / 372 page

M32C/8A Group

17. Serial Interfaces

Rev.1.00

Jul 15, 2007

Page 215 of 352

REJ09B0385-0100

17.1.1.4 Continuous Receive Mode

Continuous receive mode can be used when all of the following conditions are met.

• External clock is selected (the CKDIR bit in the UiMR register (i = 0 to 4) is set to 1)

• RTS function is disabled (RTSi pin is not selected in the Function Select Register)

When the UiRRM bit in the UiC1 register is set to 1 (continuous receive mode enabled), the TI bit in the UiC1

UiTB register if the UiRRM bit is set to 1.

17.1.1.5 CTS/RTS Function

• CTS Function

Transmit and receive operation is controlled by using the input signal to the CTSi pin (i = 0 to 4). To use

the CTS function, select the I/O port in the Function Select Register, set the CRD bit in the UiC0 register to

0 (CTS function enabled), and the CRS bit to 0 (CTS function selected).

With the CTS function used, the transmit and receive operation starts when all the following conditions are

met and an “L” signal is applied to the CTSi pin.

-The TE bit in the UiC1 register is set to 1 (transmit operation enabled)

-The TI bit in the UiC1 register is 0 (data in the UiTB register)

-The RE bit in the UiC1 register is set to 1 (receive operation enabled)

(If transmit-only operation is performed, the RE bit setting is not required)

When a high-level (“H”) signal is applied to the CTSi pin during transmitting and receiving, the transmit

and receive operation is disabled after the transmit and receive operation in progress is completed.

• RTS Function

The MCU can inform the external device that it is ready for a transmit and receive operation by using the

output signal from the RTSi pin. To use the RTS function, select the RTSi pin in the Function Select

With the RTS function used, the RTSi pin outputs an “L” signal when all the following conditions are met,

and outputs an “H” when the serial clock is input to the CLKi pin.

-The RI bit in the UiC1 register is 0 (no data in the UiRB register)

-The TE bit is set to 1 (transmit operation enabled)

-The RE bit is set to 1 (receive operation enabled)

(If transmit-only operation is performed, the RE bit setting is not required)

-The TI bit is 0 (data in the UiTB register)

17.1.1.6 Procedure When the Communication Error is Occurred

Follow the procedure below when a communication error is occurred in clock synchronous mode.

(1) Set the TE bit in the UiC1 register (i = 0 to 4) to 0 (transmit operation disabled) and the RE bit to 0

(receive operation disabled).

(2) Set bits SMD2 to SMD0 in the UiMR register to 000b (serial interface disabled).

(3) Set bits SMD2 to SMD0 in the UiMR register to 001b (clock synchronous mode).

(4) Set the TE bit to 1 (transmit operation enabled) and the RE bit to 1 (receive operation enabled).

M32C/8A датащи(PDF) 232 Page - Renesas Technology Corp

M32C/8A датащи(HTML) 232 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL