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M32C/8A датащи(PDF) 139 Page - Renesas Technology Corp |
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M32C/8A датащи(HTML) 139 Page - Renesas Technology Corp |
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139 / 372 page ![]() M32C/8A Group 13. DMAC Rev.1.00 Jul 15, 2007 Page 122 of 352 REJ09B0385-0100 Figure 13.2 DM0SL to DM3SL Registers b7 b6 b5 b4 b1 b2 b3 DMAi Request Source Select Register (i=0 to 3) Symbol DM0SL to DM3SL Address 0378h, 0379h, 037Ah, 037Bh Bit Symbol Bit Name RW DSEL0 After Reset 0X00 0000b RW NOTES: 1. Change settings of bits DSEL4 to DSEL0 while bits MDi1 and MDi0 in the DMD0 or DMD1 register are set to 00b (DMA disabled). Also, when bits DSEL4 to DSEL0 are change, set the DRQ bit to 1 at the same time. e.g., MOV.B #083h, DMiSL ; Select timer A0 2. When the DSR bit is set to 1, set the DRQ bit to 1 at the same time. e.g., OR.B #0A0h, DMiSL 3. Do not write a 0 to the DRQ bit. b0 Function DSEL1 Software DMA request bit(2) When a software trigger is selected, a DMA request is generated by setting this bit to 1 (Read as 0) Reserved bit DMA request bit(2, 3) Read as undefined value 0: Not requested 1: Requested RW RW RW − RW DSEL2 DSEL3 DSEL4 DSR − (b6) DRQ DMA request source select bits(1) See Table "DMiSL register function (i = 0 to 3)" Do not set to values other than specified in the Table. RW RW |
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