SH7616 datasheet(23/935 Pages) RENESAS

23 / 935 page

Rev. 2.00 Mar 09, 2006 page xxiii of xxvi

16.3.1 Input ..................................................................................................................... 675

16.3.2 Output .................................................................................................................. 676

16.4 SIO Interrupt Sources and DMAC .................................................................................... 679

Section 17 16-Bit Timer Pulse Unit (TPU).................................................................. 681

17.1 Overview........................................................................................................................... 681

17.1.1 Features................................................................................................................ 681

17.1.2 Block Diagram ..................................................................................................... 684

17.1.3 Pin Configuration................................................................................................. 685

17.1.4 Register Configuration......................................................................................... 686

17.2 Register Descriptions ........................................................................................................ 687

17.2.1 Timer Control Register (TCR) ............................................................................. 687

17.2.2 Timer Mode Register (TMDR) ............................................................................ 690

17.2.3 Timer I/O Control Register (TIOR) ..................................................................... 692

17.2.4 Timer Interrupt Enable Register (TIER) .............................................................. 699

17.2.5 Timer Status Register (TSR)................................................................................ 701

17.2.6 Timer Counter (TCNT)........................................................................................ 704

17.2.7 Timer General Register (TGR) ............................................................................ 705

17.2.8 Timer Start Register (TSTR)................................................................................ 705

17.2.9 Timer Synchronous Register (TSYR).................................................................. 706

17.3 Interface to Bus Master ..................................................................................................... 707

17.3.1 16-Bit Registers ................................................................................................... 707

17.3.2 8-Bit Registers ..................................................................................................... 707

17.4 Operation........................................................................................................................... 709

17.4.1 Overview.............................................................................................................. 709

17.4.2 Basic Functions.................................................................................................... 710

17.4.3 Synchronous Operation........................................................................................ 716

17.4.4 Buffer Operation .................................................................................................. 718

17.4.5 PWM Modes ........................................................................................................ 721

17.4.6 Phase Counting Mode .......................................................................................... 726

17.5 Interrupts ........................................................................................................................... 731

17.5.1 Interrupt Sources and Priorities............................................................................ 731

17.5.2 DMAC Activation................................................................................................ 732

17.6 Operation Timing.............................................................................................................. 733

17.6.1 Input/Output Timing ............................................................................................ 733

17.6.2 Interrupt Signal Timing........................................................................................ 737

17.7 Usage Notes ...................................................................................................................... 740

17.8 Usage Notes ...................................................................................................................... 750

17.8.1 Clearing Flags in TSR0 to TSR2 ......................................................................... 750

17.8.2 DMA Transfer by TPU0 ...................................................................................... 750

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