SH7616 datasheet(22/935 Pages) RENESAS

22 / 935 page

Rev. 2.00 Mar 09, 2006 page xxii of xxvi

14.3.1 Overview.............................................................................................................. 591

14.3.2 Operation in Asynchronous Mode ....................................................................... 593

14.3.3 Multiprocessor Communication Function............................................................ 605

14.3.4 Operation in Synchronous Mode ......................................................................... 613

14.3.5 Use of Transmit/Receive FIFO Buffers ............................................................... 623

14.3.6 Operation in IrDA Mode...................................................................................... 626

14.4 SCIF Interrupt Sources and the DMAC ............................................................................ 630

14.5 Usage Notes ...................................................................................................................... 631

Section 15 Serial I/O with FIFO (SIOF)....................................................................... 637

15.1 Overview........................................................................................................................... 637

15.1.1 Features................................................................................................................ 637

15.2 Register Configuration...................................................................................................... 639

15.2.1 Receive Shift Register (SIRSR)........................................................................... 639

15.2.2 Receive Data Register (SIRDR) .......................................................................... 640

15.2.3 Transmit Shift Register (SITSR).......................................................................... 641

15.2.4 Transmit Data Register (SITDR) ......................................................................... 641

15.2.5 Serial Control Register (SICTR).......................................................................... 642

15.2.6 Serial Status Register (SISTR)............................................................................. 645

15.2.7 Receive Control Data Register (SIRCDR)........................................................... 648

15.2.8 Transmit Control Data Register (SITCDR) ......................................................... 649

15.2.9 FIFO Control Register (SIFCR)........................................................................... 649

15.2.10 FIFO Data Count Register (SIFDR) .................................................................... 653

15.3 Operation .......................................................................................................................... 654

15.3.1 Input when TRMD = 0 in SIFCR......................................................................... 654

15.3.2 Output when TRMD = 0 in SIFCR...................................................................... 657

15.3.3 Output when TRMD = 1 in SIFCR...................................................................... 661

15.4 SIOF Interrupt Sources and DMAC.................................................................................. 663

Section 16 Serial I/O (SIO)............................................................................................... 665

16.1 Overview........................................................................................................................... 665

16.1.1 Features................................................................................................................ 665

16.2 Register Configuration...................................................................................................... 668

16.2.1 Receive Shift Register (SIRSR)........................................................................... 669

16.2.2 Receive Data Register (SIRDR) .......................................................................... 669

16.2.3 Transmit Shift Register (SITSR).......................................................................... 670

16.2.4 Transmit Data Register (SITDR) ......................................................................... 670

16.2.5 Serial Control Register (SICTR).......................................................................... 671

16.2.6 Serial Status Register (SISTR)............................................................................. 673

16.3 Operation .......................................................................................................................... 675

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