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R8C2K датащи(PDF) 231 Page - Renesas Technology Corp |
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R8C2K датащи(HTML) 231 Page - Renesas Technology Corp |
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231 / 471 page ![]() R8C/2K Group, R8C/2L Group 16. Timers Rev.1.10 Dec 21, 2007 Page 214 of 450 REJ09B0406-0110 16.3.8 Timer RC Interrupt Timer RC generates a timer RC interrupt request from five sources. The timer RC interrupt uses the single TRCIC register (bits IR and ILVL0 to ILVL2) and a single vector. Table 16.24 lists the Registers Associated with Timer RC Interrupt, and Figure 16.62 is a Timer RC Interrupt Block Diagram. Figure 16.62 Timer RC Interrupt Block Diagram Like other maskable interrupts, the timer RC interrupt is controlled by the combination of the I flag, IR bit, bits ILVL0 to ILVL2, and IPL. However, it differs from other maskable interrupts in the following respects because a single interrupt source (timer RC interrupt) is generated from multiple interrupt request sources. • The IR bit in the TRCIC register is set to 1 (interrupt requested) when a bit in the TRCSR register is set to 1 and the corresponding bit in the TRCIER register is also set to 1 (interrupt enabled). • The IR bit is set to 0 (no interrupt request) when the bit in the TRCSR register or the corresponding bit in the TRCIER register is set to 0, or both are set to 0. In other words, the interrupt request is not maintained if the IR bit is once set to 1 but the interrupt is not acknowledged. • If after the IR bit is set to 1 another interrupt source is triggered, the IR bit remains set to 1 and does not change. • If multiple bits in the TRCIER register are set to 1, use the TRCSR register to determine the source of the interrupt request. • The bits in the TRCSR register are not automatically set to 0 when an interrupt is acknowledged. Set them to 0 within the interrupt routine. Refer to Figure 16.32 TRCSR Register, for the procedure for setting these bits to 0. Refer to Figure 16.31 TRCIER Register, for details of the TRCIER register. Refer to 12.1.6 Interrupt Control, for details of the TRCIC register and 12.1.5.2 Relocatable Vector Tables, for information on interrupt vectors. Table 16.24 Registers Associated with Timer RC Interrupt Timer RC Status Register Timer RC Interrupt Enable Register Timer RC Interrupt Control Register TRCSR TRCIER TRCIC Timer RC interrupt request (IR bit in TRCIC register) IMFA bit IMIEA bit IMFB bit IMIEB bit IMFC bit IMIEC bit IMFD bit IMIED bit OVF bit OVIE bit IMFA, IMFB, IMFC, IMFD, OVF: Bits in TRCSR register IMIEA, IMIEB, IMIEC, IMIED, OVIE: Bits in TRCIER register |
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