7480 datasheet(31/98 Pages) RENESAS

31 / 98 page

MITSUBISHI MICROCOMPUTERS

7480/7481 GROUP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

PRELIMINAR

Notice:

This

is not

a final

specification.

Some

parametric

limits

are

subject

to change.

(1) Timer Mode

The frequency of f(XIN)/8, f(XIN)/64, f(XIN)/128 or f(XIN)/256 is

counted.

(2) Programmable Waveform Generation Mode

This operation is the same as the timer mode, except that a timer

outputs the level of the value set in the output level latch of the

timer 1 mode register/timer 2 mode register from the T0 or T1 pin

each time a timer underflows.

After the timer underflows, the timer can output an optional wave-

form from the T0 or T1 pin if the values of the output level latch and

timer latch are changed.

In this mode, set the port in common with the T0/T1 pin as an out-

put port.

Fig. 26 Block diagram of timer 1, timer 2

q Timers 1 and 2

Timer 1 and timer 2 are the 8-bit timers. They can select the fol-

lowing 2 modes by setting timer 1 mode register and timer 2 mode

• Timer mode

• Programmable waveform generation mode

When the count source is changed, set it again as the timer value

may go wrong.

Fig. 27 Structure of timer 1/timer 2 mode register

Timer stop control bit

0 : Count operation

1 : Count stop

Timer 1 mode register (T1M : address 00F9 16)

Timer 2 mode register (T2M : address 00FA 16)

Timer operation mode bit

0 : Timer mode

1 : Programmable waveform generation mode

Output level latch

0 : “L” output

1 : “H” output

Timer count source selection bits

b7 b6

0 : f(XIN)/8

1 : f(XIN)/64

0 : f(XIN)/128

1 : f(XIN)/256

Not used (“0” at read)

Timer mode register

Count stop

control bit

f(XIN)/8

Timer interrupt

request bit

Data bus

f(XIN)/64

f(XIN)/128

f(XIN)/256

Output

level latch

Timer count source

selection bits

“00”

“01”

“10”

“11”

T0, T1 output

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