7480 datasheet(42/98 Pages) RENESAS

42 / 98 page

MITSUBISHI MICROCOMPUTERS

7480/7481 GROUP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

PRELIMINAR

Notice:

This

is not

a final

specification.

Some

parametric

limits

are

subject

to change.

Recovery From Power-down Status By Key

Input Interrupt

(Key-on wake-up)

“Key-on wake-up” is one way of recovery from a power-down sta-

tus by using the STP or WIT instruction.

If an “L” level voltage is input to any pin of port P0 when bit 5 of

the edge polarity selection register is “1”, an interrupt occurs, and

a recovery can be made to the normal operating state. If a key

matrix of active “L” with port P0 as an input port is constructed, a

recovery can be made to the normal operating status by pressing

a key.

The key input interrupt is in common with the INT1 interrupt. When

bit 5 of the edge polarity selection register is set to “1”, the key in-

put interrupt function is selected. If this bit is set to “1” except in

the power-down status, both INT1 and key-on wake-up are invali-

dated.

Fig. 43 Block diagram of interrupt input/key-on wake-up circuit

P41/CNTR1

P40/CNTR0

P30/INT0

P31/INT1

P07

P01

EG3

Port P41 data read circuit

CNTR1 interrupt request signal

Port P40 data read circuit

EG0

Port P30 data read circuit

INT0 interrupt request signal

Port P31 data read circuit

INT1 interrupt request signal

CPU stop status signal

Port P0 data read circuit

EG1

EG5

P00

EG2

CNTR0 interrupt request signal

Pull-up control

Direction register

Pull-up control

Direction register

Pull-up control

Direction register

7480 датащи(PDF) 42 Page - Renesas Technology Corp

7480 датащи(HTML) 42 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98

датащи скачать

ссылки URL