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ORSPI4 датащи(PDF) 110 Page - Lattice Semiconductor |
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ORSPI4 датащи(HTML) 110 Page - Lattice Semiconductor |
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110 / 263 page ![]() Lattice Semiconductor ORCA ORSPI4 Data Sheet 110 8b/10b Encoder and 1:10 Multiplexer The 8b/10b encoder encodes the incoming 8-bit data into a 10-bit format as described previously. The input signals to the block, STBDx[7:0] are used for the 8-bit unencoded data. STBDx[8] is used as the K_control input to indicate whether the 8 data bits need to be encoded as special characters (K_control = “1”) or as data characters (K_control = 0). When STBDx[9:0] = “1”, a negative disparity present state is forced. When the encoder is bypassed STBDx[9:0] serve as the data bits for the 10-bit unencoded data. Within the 8b/10b transmission code, the bit positions of the 10-bit encoded transmission characters are labeled as a, b, c, d, e, i, f, g, h, and j in that order. Bit a corresponds to STBDx[0], bit b to STBDx[1], bit c to STBDx[2], bit d to STBDx[3], bit e to STBDx[4], bit i to STBDx[5], bit f to STBDx[6], bit g to STBDx[7], bit h to STBDx[8], and bit j to STBDx[9]. The 10-bit wide parallel data is converted to serial data by the 10:1 Multiplexer. The serial data are then sent to the CML output buffer and are transmitted serially with STBDx[0] transmitted first and STBDx[9] transmitted last. CML Output Buffer The transmitter's CML output buffer is terminated on-chip in 86 ohms to optimize the data eye, as well as to reduce the number of discrete components required. The differential output swing reaches a maximum of 1.2 V PP in the normal amplitude mode. A half amplitude mode can be selected via configuration register bit HAMP_x. Half ampli- tude mode can be used to reduce power dissipation when the transmission medium has minimal attenuation or for testing of the integrity (loss) of the physical medium. A programmable preemphasis circuit is provided to boost the high frequencies in the transmit data signal to maxi- mize the data eye opening at the far-end receiver. Preemphasis is particularly useful when the data are transmitted over backplanes or low-quality coax cables which have a frequency-dependent amplitude loss. For example, for FR4 material at 2.5 GHz, the attenuation compared to the 1.0 GHz value is about 3 dB. The attenuation is a result of skin effect loss of the PCB conductor and the dielectric loss of the PCB substrate. This attenuation causes intersymbol interface which results in the closing of the data eye opening at the receiver. Since this effect is predict- able for a given type of PCB material, it is possible to compensate for this effect in two ways - transmitter preem- phasis and receiver equalization. Each of these techniques boosts the high frequency components of the signal but transmit preemphasis is preferred due to the ease of implementation and the better power utilization. It also gives a better signal-to-noise ratio because receiver equalization amplifies both the signal and the noise at the receiver Applying too much preemphasis when it is not required, for example when driving a short backplane path, will also degrade the data eye opening at the receiver. In the ORSPI4 the degree of transmit preemphasis can be pro- grammed with a two-bit control from the microprocessor interface as shown in Table 28. The high-pass transfer function of the preemphasis circuit is given by the following equation, where the value of “a” is shown in Table 28. H(z) = (1 – az –1) (1) Table 28. Preemphasis Settings Receive Path (Backplane to FPGA) Logic The receiver section receives high-speed serial data at the external differential CML input pins. These data are fed to the clock recovery section which generates a recovered clock and retimes the data. Therefore the receive clocks are asynchronous between channels. The retimed data are deserialized and presented as an 8-bit decoded or a 10-bit unencoded parallel data on the output port. The receiver also optionally recognizes comma characters, detects code violations and aligns the bit stream to the proper word boundary. PE1 PE0 Amount of Preemphasis (a) 0 0 0% (No Preemphasis) 0 1 12.5% 1 0 12.5% 1 1 25% |
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