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L6722 датащи(PDF) 28 Page - STMicroelectronics

номер детали L6722
подробное описание детали  3 Phase controller for DC/DC converters
PDF  34 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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L6722 датащи(HTML) 28 Page - STMicroelectronics

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11 System control loop compensation
L6722
28/34
is the PWM transfer function where
∆VOSC is the oscillator ramp
amplitude and has a typical value of 4V.
Removing the dependence from the Error Amplifier gain, so assuming this gain high enough,
and with further simplifications, the control loop gain results:
The system Control Loop gain (See Figure 17) is designed in order to obtain a high DC gain to
minimize static error and to cross the 0dB axes with a constant -20dB/dec slope with the
desired crossover frequency
ωT. Neglecting the effect of ZF(s), the transfer function has one
zero and two poles; both the poles are fixed once the output filter is designed (LC filter
resonance
ωLC) and the zero (ωESR) is fixed by ESR and the Droop resistance.
Figure 17. Equivalent control loop block diagram (left) and bode diagram (right).
To obtain the desired shape an RF-CF series network is considered for the ZF(s)
implementation. A zero at
ωF=1/RFCF is then introduced together with an integrator. This
integrator minimizes the static error while placing the zero
ωF in correspondence with the L-C
resonance assures a simple -20dB/dec shape of the gain.
In fact, considering the usual value for the output filter, the LC resonance results to be at
frequency lower than the above reported zero.
Compensation network can be simply designed placing
ωFLC and imposing the cross-over
frequency
ωT as desired obtaining (always considering that ωT might be not higher than 1/10th
of the switching frequency FSW):
11.1
Compensation network guidelines
The Compensation Network design assures to having system response according to the cross-
over frequency selected and to the output filter considered: it is anyway possible to further fine-
tune the compensation network modifying the bandwidth in order to get the best response of
the system as follow:
Increase RF to increase the system bandwidth accordingly;
Decrease RF to decrease the system bandwidth accordingly;
PWM
4
5
---
V
IN
∆V
OSC
-------------------
=
OOP
s
()
4
5
---
V
IN
∆V
OSC
----------------------
Z
F
s
()
R
FB
---------------
R
O
R
DROOP
+
R
O
R
L
3
-------
+
--------------------------------------------
1s
C
O
R
DROOP
//R
O
ESR
+
()
⋅⋅
+
s
2
C
O
L
3
----
⋅⋅
s
L
3 R
O
---------------------
C
O
ESR
C
O
R
L
3
-------
++
+
-----------------------------------------------------------------------------------------------------------------------------------------------
⋅⋅
=
Reference
FB
COMP
VSEN
FBR
FBG
64k
64k
64k
RF
CF
RFB
DROOP
PWM
L / N
ESR
CO
RO
d VOUT
VOUT
VOUT
ZF(s)
ZFB(s)
REMOTE BUFFER
dB
ω
ZF(s)
GLOOP(s)
K
ω
LC = ωF
ω
ESR
ω
T
RF[dB]
F
R
FB
∆V
OSC
V
IN
-------------------------------------
5
4
---
ω
T
L
3R
DROOP
ESR
+
(
------------------------------------------------------
⋅⋅
=
C
F
C
O
L
3
---
R
F
-----------------------
=



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