9 Output voltage monitor and protections

L6722

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9

Output voltage monitor and protections

L6722 monitors through pin VSEN the regulated voltage and compares this voltage with the

one present at the REF_IN pin to manage the OVP, UVP and PGOOD conditions. Protections

are active also during soft-start (See Section 8 for details).

9.1

Under voltage

If the output voltage monitored by VSEN drops more than -300mV below the programmed

reference for more than one clock period, the device turns off all mosfets and latches the

condition: to recover it is required to cycle Vcc or the INH pin.

UVP is active when the device is enabled, after the reference reaches 0.6V.

9.2

Over voltage

When the voltage sensed by VSEN overcomes the OVP threshold, the controller permanently

switches on all the low-side mosfets and switches off all the high-side mosfets in order to

protect the load. The FLT pin is driven high (5V) and power supply or INH pin cycling is required

to restart operations.

OVP is active as soon as the device is enabled.

9.3

Preliminary over voltage

disabled is fundamental to avoid damage to the load in case of failed HS mosfets. In fact, since

the device is supplied from the 12V bus, it is basically “blind” for any voltage below the turn-on

This protection turns-on the low side mosfets as long as the FBR pin voltage is greater than

1.25V with a 300mV hysteresis. When set, the protection drives the LS mosfet with a gate-to-

source voltage depending on the voltage applied to VCC. This protection depends also on the

INH pin status as detailed in Figure 12.

A simple way to provide protection to the output in all conditions when the device is OFF (then

avoiding the unprotected red region in Figure 12-Left) consists in supplying the controller

through the 5VSB bus as shown in Figure 12-Right: 5VSB is always present before +12V and,

in case of HS short, the LS mosfet is driven with 5V assuring a reliable protection of the load.