6 Current sharing loop and current reading

L6722

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6

Current sharing loop and current reading

L6722 embeds two separate Current-Reading circuitries used to perform Current-Sharing and

OCP through ISENx pins and Voltage-Positioning through CS+ and CS- pins (See Section 7).

Current-sharing control-loop and connections are reported in Figure 6: the current read through

a voltage that with a proper gain is used to adjust the duty cycle whose dominant value is set by

the voltage error amplifier in order to equalize the current carried by each phase.

The current flowing trough each phase is read using the voltage drop across the low-side

middle of the LS conduction time and holds the tracked information during the rest of the

perform current sharing and OCP and it is given by:

Caution:

so that one phase can carry higher currents or support different cooling. To increase the current

theoretical value extracted from the above reported relationships. Start from the coolest phase

first to get the thermal balance.

Figure 6.

Current sharing loop and current reading connections

I

ISENx

R

dsON

R

ISEN

-----------------

I

PHASEx

⋅

I

INFOx

==

I

INFO1

PWM1 Out

From EA

I

INFO2

I

AVG

PWM2 Out

I

INFO3

PWM3 Out

AVG

ISENx

LGATEx

I

PHASEx

R

ISEN