MULTIPLE-BYTE WRITE AND INCREMENTAL MULTIPLE-BYTE WRITE

Register

SINGLE-BYTE READ

A6

A5

A0 R/W ACK A7

A6

A5

A4

A0 ACK

A6

A5

A0

ACK

Start

Condition

Stop

Condition

Acknowledge

Acknowledge

Acknowledge

Read/WriteBit

Register

DataByte

D7

D6

D1

D0 ACK

Read/WriteBit

Not

Acknowledge

R/W

A1

A1

RepeatStart

Condition

MULTIPLE-BYTE READ

A6

A0

ACK

Acknowledge

Read/WriteBit

R/W

A6

A0

R/W ACK

A0 ACK

D7

D0

ACK

Start

Condition

Stop

Condition

Acknowledge

Acknowledge

Acknowledge

LastDataByte

ACK

FirstDataByte

RepeatStart

Condition

Not

Acknowledge

Read/WriteBit

Register

OtherDataBytes

A7

A6

A5

D7

D0 ACK

Acknowledge

D7

D0

TPA2016D2

A multiple-byte data write transfer is identical to a single-byte data write transfer except that multiple data bytes

are transmitted by the master device to the TPA2016D2 as shown in Figure 33. After receiving each data byte,

the TPA2016D2 responds with an acknowledge bit.

Figure 33. Multiple-Byte Write Transfer

As Figure 34 shows, a single-byte data read transfer begins with the master device transmitting a start condition

read are actually executed. Initially, a write is executed to transfer the address byte of the internal memory

address to be read. As a result, the read/write bit is set to a '0'.

After receiving the TPA2016D2 address and the read/write bit, the TPA2016D2 responds with an acknowledge

bit. The master then sends the internal memory address byte, after which the TPA2016D2 issues an

acknowledge bit. The master device transmits another start condition followed by the TPA2016D2 address and

the read/write bit again. This time the read/write bit is set to '1', indicating a read transfer. Next, the TPA2016D2

transmits the data byte from the memory address being read. After receiving the data byte, the master device

transmits a not-acknowledge followed by a stop condition to complete the single-byte data read transfer.

Figure 34. Single-Byte Read Transfer

A multiple-byte data read transfer is identical to a single-byte data read transfer except that multiple data bytes

are transmitted by the TPA2016D2 to the master device as shown in Figure 35. With the exception of the last

data byte, the master device responds with an acknowledge bit after receiving each data byte.

Figure 35. Multiple-Byte Read Transfer

Copyright © 2008, Texas Instruments Incorporated

21

Product Folder Link(s): TPA2016D2