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TPA2016D2RGPR датащи(PDF) 28 Page - Texas Instruments |
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TPA2016D2RGPR датащи(HTML) 28 Page - Texas Instruments |
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28 / 35 page ![]() COMPONENT LOCATION TRACE WIDTH TPA2016D2 SLOS524B – JUNE 2008 – REVISED JUNE 2008 ............................................................................................................................................................. www.ti.com Figure 36. Land Pattern Dimensions Table 5. Land Pattern Dimensions(1) (2) (3) (4) SOLDER PAD SOLDER MASK(5) COPPER STENCIL COPPER PAD STENCIL(6) (7) OPENING DEFINITIONS OPENING THICKNESS THICKNESS 275 µm 375 µm Non solder mask 275 µm × 275 µm Sq. (rounded 1 oz max (32 µm) 125 µm thick defined (NSMD) corners) (+0.0, –25 µm) (+0.0, –25 µm) (1) Circuit traces from NSMD defined PWB lands should be 75 µm to 100 µm wide in the exposed area inside the solder mask opening. Wider trace widths reduce device stand off and impact reliability. (2) Best reliability results are achieved when the PWB laminate glass transition temperature is above the operating the range of the intended application. (3) Recommend solder paste is Type 3 or Type 4. (4) For a PWB using a Ni/Au surface finish, the gold thickness should be less 0.5 mm to avoid a reduction in thermal fatigue performance. (5) Solder mask thickness should be less than 20 µm on top of the copper circuit pattern (6) Best solder stencil performance is achieved using laser cut stencils with electro polishing. Use of chemically etched stencils results in inferior solder paste volume control. (7) Trace routing away from WCSP device should be balanced in X and Y directions to avoid unintentional component movement due to solder wetting forces. Place all the external components very close to the TPA2016D2. Placing the decoupling capacitor, CS, close to the TPA2016D2 is important for the efficiency of the Class-D amplifier. Any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency. Recommended trace width at the solder balls is 75 µm to 100 µm to prevent solder wicking onto wider PCB traces. For high current pins (PVDD (L, R), PGND, and audio output pins) of the TPA2016D2, use 100- µm trace widths at the solder balls and at least 500- µm PCB traces to ensure proper performance and output power for the device. For the remaining signals of the TPA2016D2, use 75- µm to 100-µm trace widths at the solder balls. The audio input pins (INR± and INL±) must run side-by-side to maximize common-mode noise cancellation 28 Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPA2016D2 |
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