I

2

C Interface

& Control

INL+

INL-

SDA

OUTL+

OUTL-

SDZ

INR+

INR-

SCL

Class-D

Modulator

Volume

Control

Differential

Input Left

C IN

1uF

Differential

Input Right

C IN

1uF

I

2

C Interface

IC shutdown

Power

Stage

AGC

Reference

Volume

Control

Power

Stage

OUTR+

OUTR-

AGND

PGND

Bias and

References

AVDD

PVDDR

PVDDL

AGC

Class-D

Modulator

DEVICE PINOUT

PGND

OUTL–

OUTR–

OUTR+

INL–

INR+

INL+

INR–

AGND

SDA

SCL

AVDD

PVDDL

SDZ

PVDDR

OUTL+

D 1

D 2

D 3

D 4

C 1

C 2

C 3

C 4

B1

B3

B4

B2

A1

A2

A3

A4

YZH(WCSP)PACKAGE

(TopView)

TPA2016D2

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

FUNCTIONAL BLOCK DIAGRAM

2

Copyright © 2008, Texas Instruments Incorporated

Product Folder Link(s): TPA2016D2