TDA7590 datasheet(27/40 Pages) STMICROELECTRONICS

27 / 40 page

TDA7590

Appendix 1

27/40

;

0 ------------------ RDR

;

0 ------------------- ROFCL

;--- INIT_TCS ------------------------------------------------------------------

; settings for the Transmitter Control/Status Register

;

321098765432109876543210

INIT_SAI_TCS

EQU

%000000000001010101001001

; $000549 - non incrociato

;

1 --- T0EN (0:Disbaled; 1:Enabled)

;

0 ---- T1EN (0:Disbaled; 1:Enabled)

;

0 ----- T2EN (0:Disbaled; 1:Enabled)

;

1 ------ TMME (1:Master mode; 0:Slave mode)

;

0 ------- reserved

;

10 -------- TWL[0:1] (00:16; 01:24; 10:32)

;

0 ---------- TDIR (0:MSB 1st; 1:LSB 1st)

;

1 ----------- TLRS (0:LRCKR=0-LW; 1:LRCKR=0-RW)

;

0 ------------ TCKP (0:-ve ; 1:+ve)

;

1 ------------- TREL (0:trans-1st; 1:I2S)

;

0 -------------- TDWE

;

1 --------------- TXIE (0:Disabled; 1:Enabled)

;

0 ---------------- Reserved

;

0 ----------------- TUFL

;

0 ------------------ TDE

;

0 ------------------- TUFCL

;-------------------------------------------------------------------------------

;

PLL Intitialisation values

;-------------------------------------------------------------------------------

IF 1

; Settings per sci 115200

;--- PLL_CSR -------------------------------------------------------------------

; settings for the PLL control register

;

321098765432109876543210

; settings for the PLL control register

;

321098765432109876543210

;INIT_PLL_CSR

EQU

$0E0C00

INIT_PLL_CSR

EQU

%000011100000110000000000

; $0E0C00

;

00000 --- IDF =0 (actual = IDF+1=1)

;

0 -------- RESERVED

;

0 --------- LOCK (read only; 0:out of lock)

;

0 ---------- OUTLOCK (read only; 0:in lock)

;

0001100 ----------- MF =12 (actual = MF + 1 = 13)

;

0 ------------------ PLLIE (0:intr disable)

;

0 ------------------- PWRDN (1:power down mode)

;

1 -------------------- DITEN (0:disable)

;

1 --------------------- FRACTN (0:disable)

;

1 ---------------------- PEN (1:PLL enable)

;--- FRACT ---------------------------------------------------------------------

; settings for the Fractional N part of the PLL

;

321098765432109876543210

;INIT_PLL_FCR

EQU

$0034bd

INIT_PLL_FCR

EQU

%000000000011010010111101

; $0034bd

;

01110000101001 --- FRACT = 13501

;--- CLKCTL --------------------------------------------------------------------

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