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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TDA7590 датащи(PDF) 24 Page - STMicroelectronics |
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TDA7590 датащи(HTML) 24 Page - STMicroelectronics |
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24 / 40 page  Appendix 1 TDA7590 24/40 ;------------------------------------------------------------------------ ; EQUATES for GPIOs ;------------------------------------------------------------------------ ;;; Register Addresses GPIOCTRL EQU $FFFFc4 ; Host Port Control Register GPIODIR EQU $FFFFc8 ; GPIODIR register.(HI - HDDR) GPIODAT EQU $FFFFc9 ; GPIODAT register.(HI - HDR) ;;; Bit Definitions for GPIO Direction Register GPIO0_DIR EQU $0 GPIO1_DIR EQU $1 GPIO2_DIR EQU $2 GPIO3_DIR EQU $3 GPIO4_DIR EQU $4 GPIO5_DIR EQU $5 GPIO6_DIR EQU $6 GPIO7_DIR EQU $7 GPIO8_DIR EQU $8 ;;; Bit Definitions for GPIO Data Register GPIO0_DAT EQU $0 GPIO1_DAT EQU $1 GPIO2_DAT EQU $2 GPIO3_DAT EQU $3 GPIO4_DAT EQU $4 GPIO5_DAT EQU $5 GPIO6_DAT EQU $6 GPIO7_DAT EQU $7 GPIO8_DAT EQU $8 ;------------------------------------------------------------------------ ; EQUATES for Timer ;------------------------------------------------------------------------ M_TCSR0 EQU $FFFF8F ;Timer 0 Control/Status Register (TCSR0) M_TLR0 EQU $FFFF8E ;Timer 0 Load Register (TLR0) M_TCPR0 EQU $FFFF8D ;Timer 0 Compare Register (TCPR0) M_TCR0 EQU $FFFF8C ;Timer 0 Count Register (TCR0) M_TCSR1 EQU $FFFF8B ;Timer 1 Control/Status Register (TCSR1) M_TLR1 EQU $FFFF8A ;Timer 1 Load Register (TLR1) M_TCPR1 EQU $FFFF89 ;Timer 1 Compare Register (TCPR1) M_TCR1 EQU $FFFF88 ;Timer 1 Count Register (TCR1) M_TCSR2 EQU $FFFF87 ;Timer 2 Control/Status Register (TCSR2) M_TLR2 EQU $FFFF86 ;Timer 2 Load Register (TLR2) M_TCPR2 EQU $FFFF85 ;Timer 2 Compare Register (TCPR2) M_TCR2 EQU $FFFF84 ;Timer 2 Count Register (TCR2) M_TPLR EQU $FFFF83 ;Timer Prescaler Load Register (TPLR) M_TPCR EQU $FFFF82 ;Timer Prescaler Count Register (TPCR) ;------------------------------------------------------------------------ ; ; EQUATES for Enhanced Synchronous Serial Interface (ESSI) ; ;------------------------------------------------------------------------ ;ESSI 0 interrupt equates essi0_rdf equ $30 essi0_roe equ $32 essi0_rls equ $34 |
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