DM9010
Single Chip Ethernet Controller with General Processor Interface
Preliminary
35
Version: DM9010-DS-P03
Apr. 28, 2005
1 = Local device senses a fault condition
0 = No fault detected
4.12-4.1
1
Reserved
X, RW
Reserved
Write as 0, ignore on read
4.10
FCS
0, RW
Flow Control Support
1 = Controller chip supports flow control ability
0 = Controller chip doesn’t support flow control ability
4.9
T4
0, RO/P
100BASE-T4 Support
1 = 100BASE-T4 is supported by the local device
0 = 100BASE-T4 is not supported
The DM9010 does not support 100BASE-T4 so this bit is
permanently set to 0
4.8
TX_FDX
1, RW
100BASE-TX Full Duplex Support
1 = 100BASE-TX full duplex is supported by the local
device
0 = 100BASE-TX full duplex is not supported
4.7
TX_HDX
1, RW
100BASE-TX Support
1 = 100BASE-TX half duplex is supported by the local
device
0 = 100BASE-TX half duplex is not supported
4.6
10_FDX
1, RW
10BASE-T Full Duplex Support
1 = 10BASE-T full duplex is supported by the local device
0 = 10BASE-T full duplex is not supported
4.5
10_HDX
1, RW
10BASE-T Support
1 = 10BASE-T half duplex is supported by the local device
0 = 10BASE-T half duplex is not supported
4.4-4.0
Selector
<00001>,
RW
Protocol Selection Bits
These bits contain the binary encoded protocol selector
supported by this node
<00001> indicates that this device supports IEEE 802.3
CSMA/CD
8.6 Auto-negotiation Link Partner Ability Register (ANLPAR) – 05
This register contains the advertised abilities of the link partner when received during
Auto-negotiation.
Bit
Bit Name
Default
Description
5.15
NP
0, RO
Next Page Indication
0 = Link partner, no next page available
1 = Link partner, next page available
5.14
ACK
0, RO
Acknowledge
1 = Link partner ability data reception acknowledged
0 = Not acknowledged
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
