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M7020R датащи(PDF) 29 Page - STMicroelectronics |
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M7020R датащи(HTML) 29 Page - STMicroelectronics |
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29 / 150 page ![]() 29/150 M7020R COMMAND CODES AND PARAMETERS A master device, such as an ASIC controller, is- sues commands to the M7020R using the Com- mand Valid CMDV signal and the CMD Bus. The following subsections describe the functions of the commands. Command Codes The M7020R implements four basic commands shown in Table 16. The Command Code must be presented to CMD[1:0] while keeping the com- mand valid (CMDV) signal high for two CLK2X cy- cles. These two CLK2X cycles are designated as “Cycle A” and “Cycle B.” The controller ASIC must align the instructions with the PHS_L signal. The CMD[8:2] field passes the parameters of the com- mand in Cycles A and B. Commands and Command Parameters Table 17, page 29 lists the CMD bus fields that contain the M7020R command parameters as well as their respective cycles. Table 16. Command Codes Table 17. Command Parameters Note: 1. The 272-bit-configured devices or 272-bit-configured quadrants within devices do not support the LEARN Instruction. CMD Code Command Description 00 READ Reads one of the following: data array, mask array, device registers, or external SRAM. 01 WRITE Writes one of the following: data array, mask array, device registers, or external SRAM. 10 SEARCH Searches the data array for a desired pattern using the specified register from the global mask register array and local mask associated with each data cell. 11 LEARN The device has internal storage for up to 16 comparands that it can learn. The device controller can insert these entries at the next free address (as specified by the NFA register) using the LEARN Instruction. Cmd Cyc 8 7 6 5 4 3 2 1 0 READ A SADR[21] SADR[20] X 0 0 0 0 = Single 1 = Burst 00 B0 0 0 0 0 0 0 = Single 1 = Burst 00 WRITE A SADR[21] SADR[20] X Global Mask Register Index [2:0] 0 = Single 1 = Burst 01 B0 0 0 Global Mask Register Index [2:0] 0 = Single 1 = Burst 01 SEARCH A SADR[21] SADR[20] SADR[19] Global Mask Register Index [2:0] 68-bit or 136-bit: 0 272-bit: 1 in 1st Cycle 0 in 2nd Cycle 10 B Successful Search Register Index[2:0] Comparand Register Index 1 0 LEARN(1) A SADR[21] SADR[20] X Comparand Register Index 1 1 B0 0 Mode 0: 68-bit 1: 136-bit Comparand Register Index 1 1 |
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