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PCA9601DPZ датащи(PDF) 30 Page - NXP Semiconductors |
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PCA9601DPZ датащи(HTML) 30 Page - NXP Semiconductors |
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30 / 31 page ![]() NXP Semiconductors PCA9601 Dual bidirectional bus buffer Tables Tab. 1. Ordering information ..........................................2 Tab. 2. Ordering options ................................................2 Tab. 3. Pin description ...................................................3 Tab. 4. PCA9601/PCA9600 versus P82B96 ................. 5 Tab. 5. Limiting values .................................................. 6 Tab. 6. Characteristics ...................................................7 Tab. 7. Examples of bus capability ............................. 13 Tab. 8. SnPb eutectic process (from J-STD-020D) ..... 25 Tab. 9. Lead-free process (from J-STD-020D) ............25 Tab. 10. Abbreviations ...................................................26 Tab. 11. Revision history ...............................................27 Figures Fig. 1. Block diagram of PCA9601 ...............................2 Fig. 2. Pin configuration for SO8 ..................................3 Fig. 3. Pin configuration for TSSOP8 (MSOP8) ........... 3 Fig. 4. Equivalent circuit at SX/SY ............................. 10 Fig. 5. VOL as a function of junction temperature (IOL = 0.3 mA) ................................................10 Fig. 6. VOL as a function of junction temperature (IOL = 3 mA) ...................................................10 Fig. 7. VIL as a function of junction temperature; maximum and typical values ...........................10 Fig. 8. VIH as a function of junction temperature; minimum and typical values ............................10 Fig. 9. VCC bus release limit over temperature; maximum values ............................................. 11 Fig. 10. Current sourced out of SX/SY as a function of junction temperature if these pins are externally pulled to 0.4 V or lower ...................11 Fig. 11. Typical SX/SY current versus LOW-level output voltage ..................................................11 Fig. 12. Interfacing a standard 3 mA I2C-bus or one with TTL levels (e.g. SMBus) to higher voltage or higher current sink (e.g. Fast- mode Plus) devices .........................................11 Fig. 13. Galvanic isolation of I2C-bus nodes via opto-couplers ...................................................12 Fig. 14. Long distance I2C-bus communication ........... 12 Fig. 15. Driving ribbon or flat telephone cables ............ 12 Fig. 16. Falling edge of SCL at master is delayed by the buffers and bus fall times ..................... 13 Fig. 17. Rising edge of SCL at master is delayed (clock stretch) by buffer and bus rise times ..... 14 Fig. 18. Rising edge of SDA at slave is delayed by the buffers and bus rise times .........................14 Fig. 19. I2C-bus multipoint application ......................... 16 Fig. 20. Propagation SX to TX with VRX = VCC = 3.3 V (SX pull-up to 3.3 V; TX pull-up to 5.7 V) .....................................................................16 Fig. 21. Propagation SX to TX with RX tied to TX; VCC = 3.3 V (SX pull-up to 3.3 V; TX pull- up to 5.7 V) .....................................................16 Fig. 22. Propagation RX to SX (SX pull-up to 3.3 V; VCC = 3.3 V; RX pull-up to 4.6 V) .................. 17 Fig. 23. Diode characteristic curve ...............................18 Fig. 24. Transients generated by the bus wiring ...........19 Fig. 25. Wiring transients limited by the diodes in PCA9601 ......................................................... 20 Fig. 26. Wiring transients limited by a Schottky diode ................................................................21 Fig. 27. Package outline SOT96-1 (SO8) .....................22 Fig. 28. Package outline SOT505-1 (TSSOP8) ............23 Fig. 29. Temperature profiles for large and small components .....................................................26 PCA9601 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2022. All rights reserved. Product data sheet Rev. 3.1 — 4 January 2022 30 / 31 |
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