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PCA9537DPZ датащи(PDF) 4 Page - NXP Semiconductors

номер детали PCA9537DPZ
подробное описание детали  4-bit I²C-bus and SMBus low power I/O port with interrupt and 4-bit I2C-bus and SMBus low power I/O port with interrupt and
PDF  25 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
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PCA9537DPZ датащи(HTML) 4 Page - NXP Semiconductors

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NXP Semiconductors
PCA9537
4-bit I2C-bus and SMBus low power I/O port with interrupt and reset
6.2.1 Command byte
The command byte is the first byte to follow the address byte during a write transmission.
It is used as a pointer to determine which of the registers will be written or read.
Command
Protocol
Function
0
read byte
Input Port register
1
read/write byte
Output Port register
2
read/write byte
Polarity Inversion register
3
read/write byte
Configuration register
Table 4. Command byte
6.2.2 Register 0 - Input Port register
This register is a read-only port. It reflects the incoming logic levels of the pins,
regardless of whether the pin is defined as an input or an output by Register 3. Writes to
this register have no effect.
The default value ‘X’ is determined by the externally applied logic level.
Legend: * default value.
Bit
Symbol
Access
Value
Description
7
I7
read only
1*
6
I6
read only
1*
5
I5
read only
1*
4
I4
read only
1*
not used
3
I3
read only
X*
2
I2
read only
X*
1
I1
read only
X*
0
I0
read only
X*
value ‘X’ is determined by externally applied logic
level
Table 5. Register 0 - Input Port register bit description
6.2.3 Register 1 - Output Port register
This register reflects the outgoing logic levels of the pins defined as outputs by Register
3. Bit values in this register have no effect on pins defined as inputs. Reads from this
register return the value that is in the flip-flop controlling the output selection,
not the
actual pin value.
Legend: * default value.
Bit
Symbol
Access
Value
Description
7
O7
R
1*
6
O6
R
1*
5
O5
R
1*
4
O4
R
1*
not used
Table 6. Register 1 - Output Port register bit description
PCA9537
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 7 — 8 September 2021
COMPANY PUBLIC
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