NXP Semiconductors

PCA9537

4-bit I2C-bus and SMBus low power I/O port with interrupt and reset

Tables

Tab. 1.

Ordering information ..........................................2

Tab. 2.

Ordering options ................................................2

Tab. 3.

Pin description ...................................................3

Tab. 4.

Command byte ..................................................4

Tab. 5.

Register 0 - Input Port register bit

description ......................................................... 4

Tab. 6.

Register 1 - Output Port register bit

description ......................................................... 4

Tab. 7.

Register 2 - Polarity Inversion register bit

description ......................................................... 5

Tab. 8.

Register 3 - Configuration register bit

description ......................................................... 5

Tab. 9.

Limiting values ................................................ 10

Tab. 10. Static characteristics ....................................... 10

Tab. 11. Dynamic characteristics .................................. 11

Tab. 12. Test data ..........................................................15

Tab. 13. SnPb eutectic process (from J-STD-020D) ..... 18

Tab. 14. Lead-free process (from J-STD-020D) ............18

Tab. 15. Abbreviations ...................................................19

Tab. 16. Revision history ...............................................20

Figures

Fig. 1.

Block diagram of PCA9537 ...............................2

Fig. 2.

Pin configuration for TSSOP10 ......................... 3

Fig. 3.

PCA9537 address ............................................. 3

Fig. 4.

Simplified schematic of IO0 to IO3 ....................7

Fig. 5.

Write to output port register .............................. 7

Fig. 6.

Write to configuration or polarity inversion

registers .............................................................8

Fig. 7.

Read from register ............................................ 8

Fig. 8.

Read input port register .................................... 8

Fig. 9.

Typical application .............................................9

Fig. 10.

High value resistor in parallel with the LED ....... 9

Fig. 11.

Device supplied by a lower voltage ...................9

Fig. 12.

Definition of timing .......................................... 13

Fig. 13.

I2C-bus timing diagram ...................................13

Fig. 14.

Definition of RESET timing ..............................13

Fig. 15.

Expanded view of read input port register ....... 14

Fig. 16.

Expanded view of write to output port

register .............................................................14

Fig. 17.

Test circuitry for switching times ......................14

Fig. 18.

Test circuit ....................................................... 15

Fig. 19.

Package outline SOT552-1 (TSSOP10) ..........16

Fig. 20.

Temperature profiles for large and small

components .....................................................19

PCA9537

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© NXP B.V. 2021. All rights reserved.

Product data sheet

Rev. 7 — 8 September 2021

COMPANY PUBLIC

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