TUSB1046AI-DCI datasheet(24/48 Pages) TI2

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TUSB1046A-DCI

SLLSF13B – JUNE 2017 – REVISED MAY 2019

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8.6 Register Maps

8.6.1 General Register (address = 0x0A) [reset = 00000001]

Figure 19. General Registers

Reserved

SWAP_HPDIN

EQ_OVERRID

HPDIN_OVRRI

FLIPSEL

CTLSEL[1:0].

R/W

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 11. General Registers

Bit

Field

Type

Reset

Description

7:6

Reserved.

SWAP_HPDIN

R/W

0 – HPDIN is in default location (Default)

1 – HPDIN location is swapped (PIN 23 to PIN 32, or PIN 32 to

PIN23).

EQ_OVERRIDE

R/W

Setting of this field will allow software to use EQ settings from

registers instead of value sample from pins.

0 – EQ settings based on sampled state of the EQ pins

(SSEQ[1:0], EQ[1:0], and DPEQ[1:0]).

1 – EQ settings based on programmed value of each of the EQ

registers

HPDIN_OVRRIDE

R/W

0 – HPD IN based on state of HPD_IN pin (Default)

1 – HPD_IN high.

FLIPSEL

R/W

FLIPSEL. Refer to Table 5 and Table 6 for this field functionality.

1:0

CTLSEL[1:0].

R/W

00 – Disabled. All RX and TX for USB3 and DisplayPort are

disabled.

01 – USB3.1 only enabled. (Default)

10 – Four DisplayPort lanes enabled.

11 – Two DisplayPort lanes and one USB3.1

8.6.2 DisplayPort Control/Status Registers (address = 0x10) [reset = 00000000]

Figure 20. DisplayPort Control/Status Registers (0x10)

DP1EQ_SEL

DP0EQ_SEL

R/W/U

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 12. DisplayPort Control/Status Registers (0x10)

Bit

Field

Type

Reset

Description

7:4

DP1EQ_SEL

R/W/U

0000

Field selects between 0 to 14dB of EQ for DP lane 1. When

EQ_OVERRIDE = 1’b0, this field reflects the sampled state of

DPEQ[1:0] pins. When EQ_OVERRIDE = 1’b1, software can

change the EQ setting for DP lane 1 based on value written to

this field.

3:0

DP0EQ_SEL

R/W/U

0000

Field selects between 0 to 14dB of EQ for DP lane 0. When

EQ_OVERRIDE = 1’b0, this field reflects the sampled state of

DPEQ[1:0] pins. When EQ_OVERRIDE = 1’b1, software can

change the EQ setting for DP lane 0 based on value written to

this field.

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