| поискавой системы для электроныых деталей |
|
LP38788 датащи(PDF) 10 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
LP38788 датащи(HTML) 10 Page - Texas Instruments |
|
10 / 16 page ![]() OUT(FB) 2 3 4 5 6 7 8 1 SET FB GND(CP) CP EN IN(CP) VIN VOUT GND GND CCP 10 nF COUT 10 PF R1 47.5k R2 15.0k LP38788 GND IN IN OUT OUT 9 10 11 12 VEN DAP 5.00V 5.50V CIN 1 PF MLCC + (1.20V) (5.00V) LP38788, LP38788-ADJ SNVS802B – APRIL 2012 – REVISED OCTOBER 2012 www.ti.com MOUNTING THE LLP PACKAGE The SDA12B (No Pullback) 12-Lead LLP package requires specific mounting techniques that are detailed in AN- 1187 (Literature Number: snoa401q). Referring to the section PCB Design Recommendations in AN-1187 (Page 5), it should be noted that the pad style that should be used with the SDA12B LLP package is the NSMD (non-solder mask defined) type. Additionally, it is recommended the PCB terminal pads to be 0.2 mm longer than the package pads to create a solder fillet to improve reliability and inspection. The thermal dissipation of the LLP package is directly related to the printed circuit board construction and the amount of additional copper area connected to the DAP. The DAP (exposed pad) on the bottom of the LLP package is connected to the die substrate with a conductive die attach adhesive. The DAP has no direct electrical (wire) connection to any of the twelve pins. There is a parasitic PN junction between the die substrate and the device ground. As such, it is strongly recommend that the DAP be connected directly to the ground at device leads 6 and 7 (i.e. GND). Alternately, but not recommended, the DAP may be left floating (i.e. no electrical connection). The DAP must not be connected to any potential other than ground. For the LP38788 in the SDA12B 12-Lead LLP package, the junction-to-case thermal resistance rating, θJC, is 5°C/W, where the case is on the bottom of the package at the center of the DAP. The junction-to-ambient thermal performance for the LP38788SD in the SDA12B 12-Lead LLP package, using the JEDEC JESD51 standards, is summarized in the following table: LP38788SD-ADJ (LLP-12) Thermal Performance Board Thermal θJA PSIJB θJC Type Vias JEDEC 2-Layer None 138°C/W 45.9°C/W 5°C/W JESD 51-3 1 51°C/W 26.1°C/W 2 45°C/W 24.7°C/W JEDEC 4-Layer 4 39°C/W 18.0°C/W 5°C/W JESD 51-7 6 36°C/W 14.9°C/W 8 34°C/W 13.2°C/W Typical Applications Figure 2. Typical Application, VOUT= 5.0V 10 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: LP38788 LP38788-ADJ |
|
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |