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LP38788 датащи(PDF) 4 Page - Texas Instruments

номер детали LP38788
подробное описание детали  LP38788-ADJ High PSRR, Ultra Low Noise, 800mA Linear Voltage Regulator for RF/Analog Circuits
PDF  16 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
Logo TI2 - Texas Instruments

LP38788 датащи(HTML) 4 Page - Texas Instruments

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LP38788, LP38788-ADJ
SNVS802B – APRIL 2012 – REVISED OCTOBER 2012
www.ti.com
Electrical Characteristics
Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the operating junction temperature (TJ)
range of -40°C to +125°C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical
values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless
otherwise stated the following conditions apply: VIN = 5.5V, VSET = 5.00V, CCP= 10 nF, CIN = 10 μF 50mΩ Tantalum, COUT =
10
μF X7R MLCC, IOUT = 10 mA, and TJ = 25°C.
Symbol
Parameter
Conditions
Min
Typical
Max
Units
1.188
1.212
(-1%)
(+1%)
VFB
Feedback Voltage
1.200
V
1.176
1.224
5.5V
≤ VIN ≤ 15.0V
(-2%)
(+2%)
VOS
Voltage Offset
VOUT - VSET
0
3
25
mV
IFB
Feedback Pin Current
VFB = 1.200V
-
0
1
µA
VIN = 4.5V, VSET = 4.00V
-
46
-
SET Pin Internal
ISET
VIN = 5.5V, VSET = 5.00V
28.0
52
76.0
μA
Current Sink
VIN = 12.5V, VSET = 12.0V
-
71
-
Line Regulation
5.5V
≤ VIN ≤ 15.0V
ΔVOUT / ΔVIN
-
0.005
-
%/V
(1)
IOUT = 10mA
Load Regulation
VIN = 5.5V
ΔVOUT / ΔIOUT
-
-0.2
-
%/A
(2)
10 mA
≤ IOUT ≤ 800 mA
Dropout Voltage
VDO
IOUT = 800 mA
-
250
565
mV
(3)
Under-Voltage Lock-
UVLO
VIN Rising
2.31
2.65
3.00
V
Out
ΔUVLO
UVLO Hysteresis
VIN Falling from UVLO threshold
-
180
-
mV
Ground Pin Current
IGND
IOUT = 800mA
-
1.2
5.0
mA
(4)
Ground Pin Current,
IQ
Quiescent
IOUT = 0 mA
-
1.3
5.0
mA
(4)
Ground Pin Current,
ISD
Shutdown
VEN = 0.0V
-
6.7
20.0
µA
(4)
ISC
Short Circuit Current
RLOAD = 0Ω
540
1100
2000
mA
CP Pin Voltage above
ΔVCP
VCP - VIN
-
2.8
-
V
VIN
tSTART
Start-up Time
From VEN > VEN(ON) to VOUT ≥ 98% of VOUT(NOM)
-
150
250
µs
VIN = 5.00V, VOUT = 4.70V, f = 10 kHz
-
60
-
Power Supply
PSRR
VIN = 5.00V, VOUT = 4.70V, f = 100 kHz
-
23
-
dB
Rejection Ratio
VIN = 5.00V, VOUT = 4.70V, f = 1 MHz
-
33
-
Output Noise Voltage
VIN = 5.5V, VOUT = 5.00V
eN
-
4
-
µV(RMS)
(RMS)
BW = 10 Hz to 100 kHz
ENABLE INPUT
Enable ON Threshold
VEN(ON)
VEN rising from 0.50V until Output is ON
1.05
1.25
1.45
V
Voltage
Enable Threshold
ΔVEN
VEN Falling from VEN(ON) until Output is OFF
-
100
-
mV
Voltage Hysteresis
EN Pin Low Bias
IEN(IL)
VEN = 500 mV
-
2
3.0
µA
Current
EN Pin High Bias
IEN(IH)
VEN = 2.0V
-
2
3.0
µA
Current
(1)
Line Regulation: % change in VOUT(NOM) for every 1V change in VIN= (( ΔVOUT / VOUT(NOM)) / ΔVIN ) x 100%
(2)
Load Regulation: % change in VOUT(NOM) for every 1A change in IOUT = (( ΔVOUT / VOUT(NOM) ) / ΔIOUT ) x 100%
(3)
Dropout voltage (VDO) is defined as the differential voltage measured between VOUT and VIN when VIN, falling from VIN = VOUT + 1V,
causes VOUT to drop 2% below the value measured with VIN = VOUT + 1V.
(4)
Ground pin current is the sum of the current in both GND pins (Pin 4 + Pin 5) only, and does not include current from the SET pin.
4
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Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LP38788 LP38788-ADJ



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