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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SPC560D30L3 датащи(PDF) 41 Page - STMicroelectronics |
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SPC560D30L3 датащи(HTML) 41 Page - STMicroelectronics |
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41 / 82 page  DS6494 Rev 8 41/82 SPC560D30x, SPC560D40x Electrical characteristics 77 capacitor. It is further split into four main domains to ensure noise isolation between critical LV modules within the device: – LV_COR: Low voltage supply for the core. It is also used to provide supply for FMPLL through double bonding. – LV_CFLA: Low voltage supply for code flash module. It is supplied with dedicated ballast and shorted to LV_COR through double bonding. – LV_DFLA: Low voltage supply for data flash module. It is supplied with dedicated ballast and shorted to LV_COR through double bonding. – LV_PLL: Low voltage supply for FMPLL. It is shorted to LV_COR through double bonding. Figure 7. Voltage regulator capacitance connection The internal voltage regulator requires external capacitance (CREGn) to be connected to the device in order to provide a stable low voltage digital supply to the device. Capacitances should be placed on the board as near as possible to the associated pins. Care should also be taken to limit the serial inductance of the board to less than 5 nH. Each decoupling capacitor must be placed between each of the three VDD_LV/VSS_LV supply pairs to ensure stable voltage (see Section 4.5: Recommended operating conditions). DEVICE VSS_LV VDD_BV VDD_LV VSS_LV VDD_LV VDD VSS_LV VDD_LV CREG2 (LV_COR/LV_CFLA) CREG3 CDEC2 DEVICE VDD_BV I VDD_LVn VREF VDD Voltage Regulator VSS VSS_LVn (supply/IO decoupling) (LV_COR/LV_PLL) |
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