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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SPC560D30L3 датащи(PDF) 34 Page - STMicroelectronics |
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SPC560D30L3 датащи(HTML) 34 Page - STMicroelectronics |
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34 / 82 page  Electrical characteristics SPC560D30x, SPC560D40x 34/82 DS6494 Rev 8 4.7.4 Output pin transition times 4.7.5 I/O pad current specification The I/O pads are distributed across the I/O supply segment. Each I/O supply segment is associated to a VDD/VSS supply pair as described in Table 20. Table 21 provides I/O consumption figures. In order to ensure device reliability, the average current of the I/O on a single segment should remain below the IAVGSEG maximum value. Table 19. Output pin transition times Symbol C Parameter Conditions(1) Value Unit Min Typ Max ttr CC D Output transition time output pin(2) SLOW configuration CL = 25 pF VDD = 5.0 V ± 10%, PAD3V5V = 0 —— 50 ns TCL = 50 pF — — 100 DCL = 100 pF — — 125 DCL = 25 pF VDD = 3.3 V ± 10%, PAD3V5V = 1 —— 50 TCL = 50 pF — — 100 DCL = 100 pF — — 125 ttr CC D Output transition time output pin(2) MEDIUM configuration CL = 25 pF VDD = 5.0 V ± 10%, PAD3V5V = 0 SIUL.PCRx.SRC = 1 —— 10 ns TCL = 50 pF — — 20 DCL = 100 pF — — 40 DCL = 25 pF VDD = 3.3 V ± 10%, PAD3V5V = 1 SIUL.PCRx.SRC = 1 —— 12 TCL = 50 pF — — 25 DCL = 100 pF — — 40 1. VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified. 2. CL includes device and package capacitances (CPKG < 5 pF). Table 20. I/O supply segment Package Supply segment 123 4 LQFP100 pin 16 – pin 35 pin 37 – pin 69 pin 70 – pin 83 pin 84 – pin 15 LQFP64 pin 8 – pin 26 pin 28 – pin 55 pin 56 – pin 7 — |
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