10

CSD87331Q3D

SLPS283B – SEPTEMBER 2011 – REVISED FEBRUARY 2017

www.ti.com

Product Folder Links: CSD87331Q3D

Submit Documentation Feedback

Copyright © 2011–2017, Texas Instruments Incorporated

6 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

6.1 Application Information

6.1.1 Equivalent System Performance

Many of today’s high-performance computing systems require low power consumption in an effort to reduce

system operating temperatures and improve overall system efficiency. This has created a major emphasis on

improving the conversion efficiency of today’s synchronous buck topology. In particular, there has been an

emphasis in improving the performance of the critical power semiconductor in the power stage of this application

(see Figure 28). As such, optimization of the power semiconductors in these applications, needs to go beyond

simply reducing RDS(ON).

Figure 28. Equivalent System Schematic

The CSD87331Q3D is part of TI’s power block product family which is a highly optimized product for use in a

synchronous buck topology requiring high current, high efficiency, and high frequency. It incorporates TI’s latest

generation silicon which has been optimized for switching performance, as well as minimizing losses associated

with QGD, QGS, and QRR. Furthermore, TI’s patented packaging technology has minimized losses by nearly

eliminating parasitic elements between the control FET and sync FET connections (see Figure 29). A key

challenge solved by TI’s patented packaging technology is the system level impact of Common Source

Inductance (CSI). CSI greatly impedes the switching characteristics of any MOSFET which in turn increases

switching losses and reduces system efficiency. As a result, the effects of CSI need to be considered during the

MOSFET selection process. In addition, standard MOSFET switching loss equations used to predict system

efficiency need to be modified in order to account for the effects of CSI. Further details behind the effects of CSI

and modification of switching loss equations are outlined in Power Loss Calculation With Common Source

Inductance Consideration for Synchronous Buck Converters (SLPA009).