L99UDL01 datasheet(39/88 Pages) STMICROELECTRONICS

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DS12511 Rev 5

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L99UDL01

Electrical characteristics

4.3.11

SPI timing

Table 16. SPI timing parameters

Electrical characteristics (-40°C < TJ < 130°C, 6V < VS < 18V unless otherwise specified)

SPI Timing Parameters

Req ID

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

B.018

tCLK

CLK period

250

B.019

tCLKH

Minimum CLK high time

100

B.020

tCLKL

Minimum CLK low time

100

B.021

tset CSN

CSN setup time, CSN low

before CLK rising

Active device in Normal

Mode, not in STBY

150

B.022

twake_up

Minimum CSN low pulse

timing needed before the

first SPI access

Wake up from Standby to

Normal mode

150

µs

B.023

tset CLK

CLK setup time before CSN

rising

150

B.024

tSDI(set)

SDI setup time before CLK

rising

B.025

tSDI(hold)

SDI hold time

B.026

tSDO(rise)

Rise time of SDO

CL=50 pF; guaranteed by

design

B.027

tSDO(fall)

Fall time of SDO

CL=50 pF; guaranteed by

design

B.028

ten DO tri H

CSN falling until SDO high

CL = 50 pF,

SDO=HZ t1”:

ILOAD=-1 mA; Pull-down load

to GND; Active device in

Normal Mode

100

B.029

ten DO tri L

CSN falling until SDO low

SDO=HZ t0”: ILOAD=1 mA;

Pull-up load to VCC; Active

device in Normal Mode

100

B.030

tSDO(wake) CSN falling until SDO valid

CL = 50 pF, ILOAD=-1 mA

Pull-down load to GND

0.15

B.031

tdis DO H tri

CSN rising until SDO from

high to tristate

CL = 50 pF, ILOAD=-4 mA

Pull-down load to GND

Active device in Normal

Mode

100

B.032

tdis DO L tri

CSN rising until SDO from

low to tristate

CL = 50 pF, ILOAD=4 mA

Pull-up load to VDD Active

device in Normal Mode

100

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