L99UDL01 datasheet(45/88 Pages) STMICROELECTRONICS

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DS12511 Rev 5

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L99UDL01

Serial communications

5.5.1

Advanced operation codes

There are two Advanced Operation Codes that can be used to set all control registers to the

default value or to clear all status registers. These are available along with the separate

write of all control registers and the bitwise clear of all status registers.

To execute a ‘set all control registers to default’ command, an OpCode ‘11’ at address

b’111111 is written to the SPI bus. (This is equivalent to the Read-Access to the ROM area

3FH: [11][111111]=0xFF)

To execute a ‘clear all status registers’ command, an OpCode ‘10’ at address b’111111 is

written on the SPI bus. (This is equivalent to the Read & Clear to the RAM area 3FH:

[10][111111]=0xBF)

Please note that dynamic status registers or ongoing status indications (e.g. thermal

warning or thermal shutdown) may be re-set even after being cleared by this command.

5.6

From implementation point of view it is guaranteed that no register change gets lost during

communication. In case a register value was changed during a communication it will be

reported with the next communication frame.

5.7

GSB and payload inconsistency

Due to internal implementation strategy it may occur that data reported in the GSB does not

match with data reported in the payload in case the data was changed during GSB shift out.

In this case the payload data is the status quo as it was loaded later into the SPI’s shift

5.8

Address

The two bits OpCode togheter with the six Address bits are a fixed part of the

communication frame. The six bits, in combination with the OpCode, allow to access to a 2 x

64 wide address range.

Table 19. Control register addresses

Control registers

RAM ADDR

RWC

09H

Spare Control Register (Not used)

R/W

08H

Control Register 08H

R/W

...

02H

Control Register 02H

R/W

01H

Control Register 01H

R/W

00H

Control Register 00H

R/W

00h

Device commands

RWC

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