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L99UDL01 датащи(PDF) 64 Page - STMicroelectronics |
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L99UDL01 датащи(HTML) 64 Page - STMicroelectronics |
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64 / 88 page ![]() Programmers guide L99UDL01 64/88 DS12511 Rev 5 TSD_ACT This bit determines the reaction to a thermal shutdown event on an output. If reset the thermal shutdown action is limited to the individual output OUTx (x=1...6). If set, all of the internal outputs OUTx (x=1...6), the external outputs EX_OUTx (x=1, 2) and the charge pump are disabled in a thermal shutdown event. No data is lost during a thermal shutdown event. GFI This bit enables the DOUT pin to be a reflection of the GSBN bit in the Global Status Byte. When enabled, the DOUT pin will go low if there is any fault indication in the Global Status Byte or will remain high under no fault condition. When this bit is not set the DOUT pin is tri-stated. 6.2.3 Register 04H and 05H (Driver configuration registers 1 through 3, and 4 through 6) These registers set up the current / PWM regulation for Output/Group 1, Output 2 and Output 3 in register 04H and Output 4/Group 2, Output 5 and Output 6 in register 05H These registers can be read or written to. New data is not acted upon if programmed while in timed actuation. New data will be used in subsequent timed actuations. Register 04H (Outputs 1-3) Figure 20. 04H driver configuration register 3 OC1 OC2 A5 A4 A3 A2 A1 A0 D 15 D 14 D 13 D 12 D 11 D 10 D 9 D 8 D 7 D 6 D 5 D 4 D 3D 2 D 1D 0 0 0 0 1 0 0 0100 Default Values 00000 0000000000 X Table 38. 04H register bit description Bit# Command Description 15 C/PWM_SW_3 Out 3 Current / PWM enable bit 14 OCP3_3 Out 3 Curr/PWM CNTL bit 3 13 OCP3_2 Out 3 Curr/PWM CNTL bit 2 12 OCP3_1 Out 3 Curr/PWM CNTL bit 1 11 OCP3_0 Out 3 Curr/PWM CNTL bit 0 10 C/PWM_SW_2 Out 2 Current / PWM enable bit 9 OCP2_3 Out 2 Curr/PWM CNTL bit 3 8 OCP2_2 Out 2 Curr/PWM CNTL bit 2 7 OCP2_1 Out 2 Curr/PWM CNTL bit 1 |
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