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L99UDL01 датащи(PDF) 82 Page - STMicroelectronics |
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L99UDL01 датащи(HTML) 82 Page - STMicroelectronics |
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82 / 88 page ![]() Programmers guide L99UDL01 82/88 DS12511 Rev 5 TWx These bits indicate which outputs have temperatures over the thermal warning threshold (TW). They will remain set as long as the junction temperature is above the thermal warning reset threshold (TW_RES). Once the junction temperature is below the thermal warning reset threshold they can only be cleared by a Read & Clear command. TSDx These bits indicate which outputs have exceeded the over temperature shutdown threshold. There are two reactions to a thermal shutdown. The individual output can be disabled or the entire IC can be disabled by setting TSD_ACT bit to 1 (Register 03H). The TSDx bits will remain set as long as the junction temperature is above the thermal shutdown reset threshold (TSD_RES). Once the junction temperature is below the thermal shutdown reset threshold they can only be cleared by a Read & Clear command. Offending outputs will remain latched off until their respective TSDX bits are Read & Cleared. VSOV VS overvoltage bit is set when the device has exceeded the VSOVSD threshold VSLVI VS under voltage inhibit bit is set when the VS voltage has dropped below the VSLVI_F threshold. CPLOW CPLOW will remain set indicating that the charge pump was low, below VCPLOW threshold. When CPLOW is set (i.e. the Charge Pump is low), the EXTFx_y bits (in register 11H) and the FLTx_y bits (in register 10H) may be set too. 6.3.5 Register 13H-(regulated current feedback out 1-6) 1 TW1 Thermal Warning Out 1 Cleared 0 0 LSB Parity Parity bit 1 Table 57. 12H register bit description (continued) Bit No. Function Level State after SPI Read & Clear Default (after POR) Figure 30. 13H through 18H Regulated current feedback registers OC1 OC2 A5 A4 A3 A2 A1 A0 D 15 D 14 D 13 D 12 D 11 D 10 D 9 D 8 D 7 D 6 D 5 D 4 D 3D 2 D 1D 0 0 1 1 0 01 0 0 0 0 0 1 0 1 1 1 1 0 1 0 0 1 1 0 1 0 1 0 1 0 Default Values 0000000000 00000 X |
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