AMC7836IPAPRG4 datasheet(62/91 Pages) TI2

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AMC7836

SLAS986D – NOVEMBER 2014 – REVISED FEBRUARY 2018

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7.6.8.2 DACn Data (High Byte) Register (address = 0x50 through 0x6F) [reset = 0x00]

Figure 94. DACn Data (High Byte) Register (R/W)

Reserved

DACn-DATA (11:8)

R/W-All zeros

Table 42. DACn Data (High Byte) Register Field Descriptions

Bit

Field

Type

Reset

Description

7-4

Reserved

R/W

All zeros

Reserved for factory use

3-0

DACn-DATA (11:8)

R/W

All zeros

Stores the 12-bit data to be loaded to the DAC_n latches in

straight binary format. The straight binary format is used for all

DAC ranges.

7.6.9 Status Registers: Address 0x70 through 0x72

The AMC7836 device continuously monitors all general purpose analog inputs and local temperature sensor

during normal operation. When any input is out of the specified range N consecutive times, the corresponding

alarm bit is set (1). If the input returns to the normal range before N consecutive times, the corresponding alarm

bit remains clear (0). This configuration avoids any false alarms. When an alarm status occurs, the

corresponding alarm bit is set (1). When the corresponding bit in the ALARMOUT Source Registers is cleared

(0), the ALARMOUT pin is latched.

Whenever an alarm status bit is set, it remains set until the event that caused it is resolved and its status register

is read. Reading the Alarm Status Registers clears the alarm status bits. The alarm bit can only be cleared by

reading its Alarm Status register after the event is resolved, or by hardware reset, software reset, or power-on

reset. All alarm status bits are cleared when reading the Alarm Status registers, and all these bits are reasserted

if the out-of-limit condition still exists after the next conversion cycle, unless otherwise noted.

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