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AMC7836IPAPRG4 датащи(PDF) 42 Page - Texas Instruments

номер детали AMC7836IPAPRG4
подробное описание детали  AMC7836 High-Density, 12-Bit Analog Monitor and Control Solution With Multichannel ADC, Bipolar DACs, Temperature Sensor, and GPIO Ports
PDF  91 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
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AMC7836IPAPRG4 датащи(HTML) 42 Page - Texas Instruments

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AMC7836
SLAS986D – NOVEMBER 2014 – REVISED FEBRUARY 2018
www.ti.com
Product Folder Links: AMC7836
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Copyright © 2014–2018, Texas Instruments Incorporated
7.4.3 Mixed DAC Range Mode
In the AMC7836 mixed DAC range mode, a combination of DAC groups is set to a negative voltage output range
(–5 to 0 V or –10 to 0 V) and a positive voltage output range (0 to 5 V or 0 to 10 V).
Because the maximum DAC output for each group cannot exceed the common AVCC voltage for the device
(AVCC = AVCC_AB = AVCC_CD), a DAC group in the 0 to 10 V output range forces the AVCC voltage to a value
greater or equal to 10 V. If all positive DAC groups are in the 0 to 5 V range the AVCC voltage can be set to a
value as low as 5 V.
The minimum DAC output for each group cannot be lower than the voltage on the corresponding AVSS pins
(AVEE, AVSSB, AVSSC and AVSSD). The AVSS pins are not required to be tied to the same potential and typically
the negative voltage at each AVSS pin is dictated by the desired operating DAC negative output range. One
exception is the AVEE pin which must be the lowest potential in the device. The implication of this requirement is
that if either DAC group B, C or D is set to a negative output range, DAC group A must also be set to a negative
range. The thermal pad should be either tied to the same potential as the AVEE pin or left disconnected. Table 7
lists the typical configurations for this mode.
Table 7. Mixed DAC Range Mode Typical Configuration
PIN
NOTES
TYPICAL CONNECTION
AVDD
5 V
DVDD
DVDD must be equal to AVDD.
5 V
IOVDD
IOVDD must be equal to or less than DVDD.
1.8 V to 5 V
AVCC_AB, AVCC_CD
The AVCC_AB and AVCC_CD pins must be tied to the
same potential (AVCC).
AVCC must be greater or equal to the maximum
possible output voltage for any of the positive
output range DACs.
AVCC ≥ 5 V
AVCC ≥ 10 V
AVEE
AVEE must be the lowest potential in the device.
AVEE must be less than or equal to the minimum
possible output voltage for DAC group A.
AVEE
≤ –5 V
AVEE
≤ –10 V
AVSSB, AVSSC, AVSSD
AVSSn must be less than or equal than the minimum
possible output voltage for DAC group n (n = B, C,
D).
Negative Range
AVEE ≤ AVSSn ≤ –5 V
AVEE ≤ AVSSn ≤ –10 V
Positive Range
AGND
Thermal Pad
AVEE or,
Floating
After power-on or a reset event the output range for each DAC group is set automatically by the voltage present
in the corresponding AVSS pin. When the AVSS voltage of a DAC group is lower than the threshold value, AVSSTH,
the output for that DAC group is automatically configured to the –10 to 0 V range. Conversely, if the AVSS voltage
of the DAC group is higher than AVSSTH, the DAC-group output is automatically set to the 0 to 5 V range. The
output for any of the DAC groups can be modified after initialization by setting the corresponding DAC range
register (address 0x1E to 0x1F).
In addition to setting the default output range, the AVSS pins also set the clamp voltage for each DAC group.
Because the clamp voltage is only dependent on the voltage in the AVSS pin, changes to the DAC range
registers do not affect the clamp setting.
NOTE
Although not a recommended operating condition, the device allows a DAC group to
operate in a positive output range even if the clamp voltage is negative (AVSS connected
to a negative supply voltage).



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