 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
AMC7836IPAPRG4 датащи(PDF) 58 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
AMC7836IPAPRG4 датащи(HTML) 58 Page - Texas Instruments |
|
|
58 / 91 page  58 AMC7836 SLAS986D – NOVEMBER 2014 – REVISED FEBRUARY 2018 www.ti.com Product Folder Links: AMC7836 Submit Documentation Feedback Copyright © 2014–2018, Texas Instruments Incorporated 7.6.5 DAC Clear and ALARMOUT Source Select: Address 0x1A through 0x1D 7.6.5.1 DAC Clear Source 0 Register (address = 0x1A) [reset = 0x00] Figure 83. DAC Clear Source 0 Register (R/W) 7 6 5 4 3 2 1 0 Reserved ADC20-ALR- CLR ADC19-ALR- CLR ADC18-ALR- CLR ADC17-ALR- CLR ADC16-ALR- CLR R/W-All zeros R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 Table 30. DAC Clear Source 0 Register Field Descriptions Bit Field Type Reset Description 7-5 Reserved R/W All zeros Reserved for factory use 4 ADC20-ALR-CLR R/W 0 This register selects which alarm forces DACs into a clear state, regardless of which DAC operation mode is active, auto or manual. In order for DAC_n to go into clear mode, it must be enabled in the DAC Clear Enable registers. 3 ADC19-ALR-CLR R/W 0 2 ADC18-ALR-CLR R/W 0 1 ADC17-ALR-CLR R/W 0 0 ADC16-ALR-CLR R/W 0 7.6.5.2 DAC Clear Source 1 Register (address = 0x1B) [reset = 0x00] Figure 84. DAC Clear Source 1 Register (R/W) 7 6 5 4 3 2 1 0 Reserved ALARMIN-ALR THERM-ALR LT-HIGH-ALR LT-LOW-ALR R/W-All zeros R/W-0 R/W-0 R/W-0 R/W-0 Table 31. DAC Clear Source 1 Register Field Descriptions Bit Field Type Reset Description 7-4 Reserved R/W All zeros Reserved for factory use 3 ALARMIN-ALR R/W 0 This register selects which alarm forces DACs into a clear state, regardless of which DAC operation mode is active, auto or manual. In order for DAC_n to go into clear mode, it must be enabled in the DAC Clear Enable registers. 2 THERM-ALR R/W 0 1 LT-HIGH-ALR R/W 0 0 LT-LOW-ALR R/W 0 7.6.5.3 ALARMOUT Source 0 Register (address = 0x1c) [reset = 0x00] Figure 85. ALARMOUT Source 0 Register (R/W) 7 6 5 4 3 2 1 0 Reserved ADC20-ALR- OUT ADC19-ALR- OUT ADC18-ALR- OUT ADC17-ALR- OUT ADC16-ALR- OUT R/W-All zeros R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 Table 32. ALARMOUT Source 0 Register Field Descriptions Bit Field Type Reset Description 7-5 Reserved R/W All zeros Reserved for factory use 4 ADC20-ALR-OUT R/W 0 This register selects which alarms can activate the ALARMOUT pin. The ALARMOUT must be enabled for this function to take effect. 3 ADC19-ALR-OUT R/W 0 2 ADC18-ALR-OUT R/W 0 1 ADC17-ALR-OUT R/W 0 0 ADC16-ALR-OUT R/W 0 |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
