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LM5035CMH/NOPB датащи(PDF) 5 Page - Texas Instruments |
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LM5035CMH/NOPB датащи(HTML) 5 Page - Texas Instruments |
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5 / 43 page ![]() 5 LM5035C www.ti.com SNVS631D – JANUARY 2010 – REVISED OCTOBER 2016 Product Folder Links: LM5035C Submit Documentation Feedback Copyright © 2010–2016, Texas Instruments Incorporated Pin Functions (continued) PIN I/O DESCRIPTION APPLICATION INFORMATION NAME HTSSOP WQFN CS 7 6 I Current Sense input for current limit If CS exceeds 0.25 V the output pulse will be terminated, entering cycle-by-cycle current limit. An internal switch holds CS low for 50 ns after HO or LO switches high to blank leading edge transients. SS 8 7 I Soft-start Input An internal 110-µA current source charges an external capacitor to set the soft-start rate. During a current limit restart sequence, the internal current source is reduced to 1.2 µA to increase the delay before retry. DLY 9 8 I Timing programming pin for the LO and HO to SR1 and SR2 outputs. An external resistor to ground sets the timing for the non- overlap time of HO to SR1 and LO to SR2. RES 10 9 I Restart Timer If cycle-by-cycle current limit is exceeded during any cycle, a 22-µA current is sourced to the RES pin capacitor. If the RES capacitor voltage reaches 2.5 V, the soft-start capacitor will be fully discharged and then released with a pullup current of 1.2 µA. After the first output pulse at LO (when SS > COMP offset, typically 1 V), the SS pin charging current will revert to 110 µA. HB 11 11 I/O Boost voltage for the HO driver An external diode is required from VCC to HB and an external capacitor is required from HS to HB to power the HO gate driver. HS 12 12 I/O Switch node Connection common to the transformer and both power switches. Provides a return path for the HO gate driver. HO 13 13 O High-side gate drive output. Output of the high-side PWM gate driver. Capable of sinking 2-A peak current. LO 14 14 O Low-side gate drive output. Output of the low-side PWM gate driver. Capable of sinking 2-A peak current. PGND 15 15 GND Power Ground Connect directly to Analog Ground. VCC 16 16 I/O Output of the high-voltage start-up regulator. The VCC voltage is regulated to 7.6 V. If an auxiliary winding raises the voltage on this pin above the regulation setpoint, the start-up regulator will shut down, thus reducing the internal power dissipation. SR2 17 17 O Synchronous rectifier driver output. Control output of the synchronous FET gate. Capable of 0.5-A peak current. SR1 18 18 O Synchronous rectifier driver output. Control output of the synchronous FET gate. Capable of 0.5-A peak current. REF 19 19 O Output of 5-V Reference Maximum output current is 20 mA. Locally decoupled with a 0.1-µF capacitor. VIN 20 21 I Input voltage source Input to the start-up regulator. Operating input range is 13 V to 100 V with transient capability to 105 V. For power sources outside of this range, the LM5035C can be biased directly at VCC by an external regulator. EP EP EP GND Exposed Pad, underside of package No electrical contact. Connect to system ground plane for reduced thermal resistance. NC — 1 — No connection No electrical contact. NC — 10 — No connection No electrical contact. NC — 20 — No connection No electrical contact. NC — 22 — No connection No electrical contact. |
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