PWM

COMPARATOR

5 V

COMP

REF

LM5035C

+

_

5k

1 V

SOFT-START

FEED-FORWARD RAMP

Voltage

feedback

LM4041

Potential across

Optocoupler detector

is constant (approx. 4.3 V)

1 : 1

Copyright © 2016, Texas Instruments Incorporated

17

LM5035C

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SNVS631D – JANUARY 2010 – REVISED OCTOBER 2016

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Feature Description (continued)

Figure 13. Optocoupler to COMP Interface

8.3.7 Soft Start

The soft-start circuit allows the regulator to gradually reach a steady state operating point, thereby reducing start-

up stresses and current surges. When bias is supplied to the LM5035C, the SS pin capacitor is discharged by an

internal MOSFET. When the UVLO, VCC and REF pins reach their operating thresholds, the SS capacitor is

released and charged with a 110-µA current source. The PWM comparator control voltage is clamped to the SS

pin voltage by an internal amplifier. When the PWM comparator input reaches 1 V, output pulses commence with

slowly increasing duty cycle. The voltage at the SS pin eventually increases to 5 V, while the voltage at the PWM

comparator increases to the value required for regulation as determined by the voltage feedback loop.

One method to shutdown the regulator is to ground the SS pin. This forces the internal PWM control signal to

ground, reducing the output duty cycle quickly to zero. Releasing the SS pin begins a soft-start cycle and normal

operation resumes. A second shutdown method is discussed in UVLO.

8.3.8 PWM Comparator

The pulse width modulation (PWM) comparator compares the voltage ramp signal at the RAMP pin to the loop

error signal. This comparator is optimized for speed to achieve minimum controllable duty cycles. The loop error

signal is received from the external feedback and isolation circuit is in the form of a control current into the

COMP pin. The COMP pin current is internally mirrored by a matched pair of NPN transistors which sink current

through a 5-kΩ resistor connected to the 5-V reference. The resulting control voltage passes through a 1-V level

shift before being applied to the PWM comparator.

An opto-coupler detector can be connected between the REF pin and the COMP pin. Because the COMP pin is

controlled by a current input, the potential difference across the optocoupler detector is nearly constant. The

bandwidth limiting phase delay which is normally introduced by the significant capacitance of the opto-coupler is

thereby greatly reduced. Higher loop bandwidths can be realized because the bandwidth-limiting pole associated

with the opto-coupler is now at a much higher frequency. The PWM comparator polarity is configured such that

with no current into the COMP pin, the controller produces the maximum duty cycle at the main gate driver

outputs, HO and LO.

8.3.9 Feedforward Ramp and Volt • Second Clamp

An external resistor (RFF) and capacitor (CFF) connected to VIN, AGND, and the RAMP pin are required to create

the PWM ramp signal. The slope of the signal at RAMP will vary in proportion to the input line voltage. This

varying slope provides line feedforward information necessary to improve line transient response with voltage

mode control. The RAMP signal is compared to the error signal by the pulse width modulator comparator to

control the duty cycle of the HO and LO outputs. With a constant error signal, the on-time (TON) varies inversely

with the input voltage (VIN) to stabilize the Volt • Second product of the transformer primary signal. The power

path gain of conventional voltage-mode pulse width modulators (oscillator generated ramp) varies directly with

input voltage. The use of a line generated ramp (input voltage feedforward) nearly eliminates this gain variation.

As a result, the feedback loop is only required to make very small corrections for large changes in input voltage.