8 PA

17 PA

Bias Enable

Soft-Start Enable

1.25V

10k

SD

+

-

14

LM2743

SNVS276I – APRIL 2004 – REVISED FEBRUARY 2019

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Feature Description (continued)

7.3.6 SD Pin Impedance

When connecting a resistor divider to the SD pin of the LM2743 some care has to be taken. Once the SD voltage

goes above VSD-IH, a 17-µA pull-up current is activated as shown in Figure 24. This current is used to create the

internal hysteresis (

≊170 mV); however, high external impedances will affect the SD pin logic thresholds as well.

The external impedance used for the sequencing divider network should preferably be a small fraction of the

impedance of the SD pin for good performance (around 1 k

Ω).

Figure 24. SD Pin Logic

7.3.7 MOSFET Gate Drivers

The LM2743 has two gate drivers designed for driving N-channel MOSFETs in a synchronous mode. Note that

unlike most other synchronous controllers, the bootstrap capacitor of the LM2743 provides power not only to the

driver of the upper MOSFET, but the lower MOSFET driver too (both drivers are ground referenced, i.e. no

floating driver). To fully turn the top MOSFET on, the BOOT voltage must be at least one gate threshold greater

than VIN when the high-side drive goes high. This bootstrap voltage is usually supplied from a local charge pump

structure. But looking at the Typical Application schematic, this also means that the difference voltage VCC - VD1,

which is the voltage the bootstrap capacitor charges up to, must be always greater than the maximum tolerance

limit of the threshold voltage of the upper MOSFET. Here VD1 is the forward voltage drop across the bootstrap

diode D1. This therefore may place restrictions on the minimum input voltage and/or type of MOSFET used.

The most basic charge bootstrap pump circuit can be built using one Schottky diode and a small capacitor, as

shown in Figure 25. The capacitor CBOOT serves to maintain enough voltage between the top MOSFET gate and

source to control the device even when the top MOSFET is on and its source has risen up to the input voltage

level. The charge pump circuitry is fed from VCC, which can operate over a range from 3.0V to 6.0V. Using this

basic method the voltage applied to the gates of both high-side and low-side MOSFETs is VCC - VD. This method

works well when VCC is 5 V±10%, because the gate drives will get at least 4.0V of drive voltage during the worst

case of VCC-MIN = 4.5 V and VD-MAX = 0.5 V. Logic level MOSFETs generally specify their on-resistance at VGS =

4.5 V. When VCC = 3.3 V ±10%, the gate drive at worst case could go as low as 2.5 V. Logic level MOSFETs are

not specified to turn on, or may have much higher on-resistance at 2.5 V. Sub-logic level MOSFETs, usually

specified at VGS = 2.5 V, will work, but are more expensive, and tend to have higher on-resistance. The circuit in

Figure 25 works well for input voltages ranging from 1 V up to 16 V and VCC = 5 V ±10%, because the drive

voltage depends only on VCC.