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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LM2743MTC/NOPB датащи(PDF) 13 Page - Texas Instruments |
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LM2743MTC/NOPB датащи(HTML) 13 Page - Texas Instruments |
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13 / 44 page  t = 5 ms VOUT1 VOUT2 5V 1.8V VSD-IH 1.08V RS1 SRSD = SROUT1 RS1 + RS2 Master Power Supply VOUT1 LM2743 RS1 RFB2 RFB1 FB VOUT2 VFB SD RS2 13 LM2743 www.ti.com SNVS276I – APRIL 2004 – REVISED FEBRUARY 2019 Product Folder Links: LM2743 Submit Documentation Feedback Copyright © 2004–2019, Texas Instruments Incorporated Feature Description (continued) Figure 22. Sequencing Circuit A desired delay time tDELAY between the startup of the master supply output voltage and the LM2743 output voltage can be set based on the SD pin low-to-high threshold VSD-IH and the slew rate of the voltage at the SD pin, SRSD: tDELAY = VSD-IH / SRSD (6) Note again, that in Figure 22, the output voltage of the LM2743 has been represented symbolically as VOUT2,. without explicitly showing the power components. VSD-IH is typically 1.08V and SRSD is the slew rate of the SD pin voltage. The values of the sequencing divider resistors RS1 and RS2 set the SRSD based on the master supply output voltage slew rate, SROUT1, using the following equation: (7) For example, if the master supply output voltage slew rate was 1V/ms and the desired delay time between the startup of the master supply and LM2743 output voltage was 5ms, then the desired SD pin slew rate would be (1.08V/5 ms) = 0.216 V/ms. Due to the internal impedance of the SD pin, the maximum recommended value for RS2 is 1 kΩ. To achieve the desired slew rate, RS1 would then be 274 Ω. A timing diagram for this example is shown in Figure 23. Figure 23. Delay for Sequencing |
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