PCM1802DB datasheet(3/35 Pages) TI2

3 / 35 page

VINL

MODE1

VINR

MODE0

VREF1

FMT1

VREF2

FMT0

VCC

OSR

AGND

SCKI

PDWN

VDD

BYPAS

DGND

FSYNC

DOUT

LRCK

BCK

Not to scale

PCM1802

www.ti.com

SLES023D – DECEMBER 2001 – REVISED DECEMBER 2016

Product Folder Links: PCM1802

Submit Documentation Feedback

(1)

Schmitt-Trigger input

(2)

Schmitt-Trigger input with internal pulldown (50 kΩ typically), 5-V tolerant

(3)

Schmitt-Trigger input, 5-V tolerant

5 Pin Configuration and Functions

DB Package

20-Pin SSOP

Top View

Pin Functions

I/O

DESCRIPTION

NAME

NO.

AGND

—

Analog GND

BCK

I/O

Bit clock input and output(1)

BYPAS

HPF bypass control. Low: normal mode (DC cut); High: bypass mode (through)(2)

DGND

—

Digital GND

DOUT

Audio data output

FMT0

Audio data format select 0 (see Data Format)(2)

FMT1

Audio data format select 1 (see Data Format)(2)

FSYNC

I/O

Frame synchronous clock input and output(1)

LRCK

I/O

Sampling clock input and output(1)

MODE0

Mode select 0 (see Interface Mode)(2)

MODE1

Mode select 1 (see Interface Mode)(2)

OSR

Oversampling ratio select. Low: ×64 fS; High: ×128 fS

(2)

PDWN

Power-down control, active-low(2)

SCKI

System clock input; 256 fS, 384 fS, 512 fS, or 768 fS

(3)

VCC

—

Analog power supply, 5 V

VDD

—

Digital power supply, 3.3 V

VINL

Analog input, L-channel

VINR

Analog input, R-channel

VREF1

—

Reference-1 decoupling capacitor

VREF2

—

Reference-2 voltage input, normally connected to VCC

PCM1802DB датащи(PDF) 3 Page - Texas Instruments

PCM1802DB датащи(HTML) 3 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35

датащи скачать

ссылки URL