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ADS5281IPFPR датащи(PDF) 19 Page - Texas Instruments |
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ADS5281IPFPR датащи(HTML) 19 Page - Texas Instruments |
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19 / 41 page ![]() www.ti.com LVDS INTERNAL TERMINATION PROGRAMMABILITY ADS5281 ADS5282 SBAS397E – DECEMBER 2006 – REVISED JANUARY 2008 All three drive strengths (bit clock, frame clock, and data) are programmed using sets of three bits. Table 4 shows an example of how the drive strength of the bit clock is programmed (the method is similar for the frame clock and data drive strengths). Table 4. Bit Clock Drive Strength(1) ILVDS_LCLK<2> ILVDS_LCLK<1> ILVDS_LCLK<0> LVDS DRIVE STRENGTH FOR LCLKP AND LCLKN 0 0 0 3.5mA (default) 0 0 1 2.5mA 0 1 0 1.5mA 0 1 1 0.5mA 1 0 0 7.5mA 1 0 1 6.5mA 1 1 0 5.5mA 1 1 1 4.5mA (1) Current settings lower than 1.5mA are not recommended. ADDRESS IN HEX D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 NAME X EN_LVDS_TERM 1 X X X TERM_LCLK<2:0> 12 1 X X X TERM_FRAME<2:0> 1 X X X TERM_DAT<2:0> The LVDS buffers have high-impedance current sources driving the outputs. When driving traces whose characteristic impedance is not perfectly matched with the termination impedance on the receiver side, there may be reflections back to the LVDS output pins of the ADS528x that cause degraded signal integrity. By enabling an internal termination (between the positive and negative outputs) for the LVDS buffers, the signal integrity can be significantly improved in such scenarios. To set the internal termination mode, the EN_LVDS_TERM bit should be set to '1'. Once this bit is set, the internal termination values for the bit clock, frame clock, and data buffers can be independently programmed using sets of three bits. Table 5 shows an example of how the internal termination of the LVDS buffer driving the bit clock is programmed (the method is similar for the frame clock and data drive strengths). These termination values are only typical values and can vary by up to ±20% across temperature and from device to device. Table 5. Bit Clock Internal Termination INTERNAL TERMINATION BETWEEN TERM_LCLK<2> TERM_LCLK<1> TERM_LCLK<0> LCLKP AND LCLKN IN Ω 0 0 0 None 0 0 1 260 0 1 0 150 0 1 1 94 1 0 0 125 1 0 1 80 1 1 0 66 1 1 1 55 Copyright © 2006–2008, Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Link(s): ADS5281 ADS5282 |
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