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PCM1742

SBAS176A – DECEMBER 2000 – REVISED APRIL 2005

ELECTRICAL CHARACTERISTICS (continued)

All specifications at T

A = 25°C, VCC = 5 V, VDD = 3.3 V, fS = 44.1 kHz, system clock = 384 fS, and 24-bit data (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Input Logic Current

IIH

High-level input current(1)

VIN = VDD

10

µA

IIL

Low-level input current(1)

VIN = 0 V

–10

µA

IIH

High-level input current(2)

VIN = VDD

65

100

µA

IIL

Low-level input current(2)

VIN = 0 V

–10

µA

Output Logic Level

VOH

High-level output voltage(3)

IOH = –2 mA

2.4

Vdc

VOL

Low-level output voltage(3)

IOL = 2 mA

1

Vdc

DYNAMIC PERFORMANCE(4)(5)

PCM1742E

VOUT = 0 dB, fS = 44.1 kHz

0.003%

0.008%

VOUT = 0 dB, fS = 96 kHz

0.004%

VOUT = 0 dB, fS = 192 kHz

0.005%

THD+N

Total harmonic distortion + noise

VOUT = –60 dB, fS = 44.1 kHz

1.2%

VOUT = –60 dB, fS = 96 kHz

1.6%

VOUT = –60 dB, fS = 192 kHz

1.8%

EIAJ, A-weighted, fS = 44.1 kHz

94

100

Dynamic range

A-weighted, fS = 96 kHz

98

dB

A-weighted, fS = 192 kHz

96

EIAJ, A-weighted, fS = 44.1 kHz

94

100

SNR

Signal-to-noise ratio

A-weighted, fS = 96 kHz

98

dB

A-weighted, fS = 192 kHz

96

fS = 44.1 kHz

91

98

Channel separation

fS = 96 kHz

96

dB

fS = 192 kHz

94

Level linearity error

VOUT = –90 dB

±0.5

dB

(1)

Pins 1, 2, 3, 16 (SCK, BCK, LRCK, DATA).

(2)

Pins 13–15 (MD, MC, ML).

(3)

Pins 11, 12 (ZEROR, ZEROL).

(4)

Analog performance specifications are tested with a Shibasoku #725 THD meter with 400-Hz HPF on, 30-kHz LPF on, and an average

mode with 20-kHz bandwidth limiting. The load connected to the analog output is 5 k

Ω or larger, via capacitive coupling.

(5)

Conditions in 192-kHz operation are: system clock = 128 fS and oversampling rate = 64 fS (under register control).

3