VI

RG1

RG2

VOCM

RL

VO

RF1

RF2

CL

RO

RO

EN

a

+

-

LMP8350

SNOSB80C – FEBRUARY 2011 – REVISED OCTOBER 2015

www.ti.com

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.1.1 Fully-Differential Operation

The LMP8350 will perform best when used with split supplies and in a fully-differential configuration. See

Figure 29 for recommend circuits.

Figure 29. Typical Fully-Differential Application

The circuit shown in Figure 29 is a typical fully-differential application as might be used to drive a Sigma Delta

ADC. In this circuit, closed-loop gain is calculated by Equation 1:

(AV) = VOUT/ VIN = RF/RG

where

•

RF=RF1=RF2 and RG=RG1=RG2

(1)

For all the applications in this data sheet , VIN is presumed to be the voltage presented to the circuit by the signal

source. For differential signals this will be the difference of the signals on each input (which will be double the

magnitude of each individual signal), while in single-ended inputs it will just be the driven input signal.

When fed with a differential signal, the LMP8350 provides excellent distortion, balance and common-mode

rejection, provided the resistors RF, RG and any input termination resistors (RT) are well-matched and strict

symmetry is observed in board layout. With a DC CMRR of over 80 dB, the DC and low frequency CMRR of

most circuits will be dominated by the external resistor matching and board trace resistance. At low distortion

levels, board layout symmetry and supply bypassing become a factor as well. It is assumed throughout this

document that RF1 = RF2 and RG1 = RG2 for maximum channel symmetry

Precision resistors of at least 0.1% accuracy or better are recommended and careful board layout will also be

required for optimum performance.

Operation with RF feedback resistors as low as 300 Ω is possible in the high and medium power modes. This will

slightly improve the noise and bandwidth results. However, feedback resistors with RF values of less than 1 KΩ

should be avoided in the low power mode due to the reduced output drive current capabilities. If low value

resistors (< 300

Ω) must be used in the low power mode, the maximum output swing will need to be limited.

The resistors RO help keep the amplifier stable when presented with a load CL, as is common when driving an

analog to digital converter (ADC).

22

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