LM98640CVAL datasheet(47/55 Pages) TI2

номер детали	LM98640CVAL

подробное описание детали	LM98640QML-SP Radiation Hardness Assured (RHA), Dual Channel, 14-Bit, 40-MSPS Analog Front End With LVDS Output

PDF	55 Pages

Scroll/Zoom	100%

производитель	TI2 [Texas Instruments]

домашняя страница	https://www.ti.com

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47 / 55 page

Image Processor/

ASIC

3.3V

1.8V

4.7

0.1 µF

0.1 µ

0.1 µF

100

CCD

Sensor

and

Output

Signal

Buffers

CCD Clock

Drivers

0.1 µF

VCOM1

VDD33

VSS33

OS1-

OS1+

VSS33

VCLP

VSS33

OS2+

OS2-

VSS33

VDD33

VCOM2

ATB0

VDD18

VSS18

TXCLK-

TXCLK+

TXOUT0-

TXOUT0+

TXOUT1-

TXOUT1+

TXOUT2-

TXOUT2+

TXOUT3-

TXOUT3+

TXFRM-

TXFRM+

VSS18

VDD18

LM98640QML-SP

CCD Timing Output Bus

Serial Interface and

Device Control Bus

10 k

Pins 2,3

Pins 15,16

Pin 22

Pin 23

Pin 32

Pin 35

Pin 50

Pins 53,54

Pins 4,5

Pins 13,14

Pin 21

Pin 24

Pin 31

Pin 36

Pin 49

Pins 55,56

0.1

Pin 60

Pin 61

Pin 59

Pin 62

0.1 µF

VREFBG

Pin 65

0.1 µF

LM98640QML-SP

www.ti.com

SNAS461G – MAY 2010 – REVISED NOVEMBER 2018

Product Folder Links: LM98640QML-SP

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8.2 Typical Application

8.2.1 Sample/Hold Mode

Figure 29. Typical CDS Mode Application Diagram

8.3 Initialization Set Up

1. Power up supply voltages VDD33 and VDD18.

2. Apply signal to INCLK.

3. Write all configuration registers. Be sure to set the INCLK Range (2x05) and Sample & Hold (0x06) for the

INCLK frequency used.

4. Write the Test & Scan register (3x0D) before the Clock Monitor register (0x09).

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