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LM98640CVAL датащи(PDF) 45 Page - Texas Instruments

номер детали LM98640CVAL
подробное описание детали  LM98640QML-SP Radiation Hardness Assured (RHA), Dual Channel, 14-Bit, 40-MSPS Analog Front End With LVDS Output
PDF  55 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
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LM98640CVAL датащи(HTML) 45 Page - Texas Instruments

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LM98640QML-SP
www.ti.com
SNAS461G – MAY 2010 – REVISED NOVEMBER 2018
Product Folder Links: LM98640QML-SP
Submit Documentation Feedback
Copyright © 2010–2018, Texas Instruments Incorporated
Table 9. Register Definitions - Digital Configuration (continued)
ADDRESS
(BINARY)
REGISTER
TITLE
BASELINE
(BINARY)
BIT(s)
DESCRIPTION
11 1001
Test Pattern Value
0000 0000
[7:0]
Lower 6 bits of Test Pattern Value Register. Specifies the lower 6 bits
of the test code value during Fixed Pattern and LVDS test, initial value
during H Gradient & V Gradient pattern, and higher value in the Lattice
and Stripe Pattern.
11 1100
Digital Configuration
0000 0000
[7:0]
Serial Communication Configuration Register.
[7:1]
Not Used.
[0]
Micro-Wire Automatic Read Disable.
0 Read data is always sent out on SDO during the first 8 SCLK cycles.
The register is selected by the register address in the previous cycle.
(read or write)
1 Automatic read is disabled.
To read from a register two cycles need to be initiated by the master,
first cycle should be a read with the correct register address and
second can be a dummy read or read from another address or a write
cycle, and the data is sent first 8 SCLK of the second cycle. After a
write command SDO remains in Tri-State during first 8 SCLK.
11 1101
Test & Scan Control
0000 0000
[7:0]
Test & Scan Control Register
[7:6]
Not Used.
[5]
Test Pattern Voting Switch.
0 Enable. Circuit Redundancy Voting is active.
1 Disable. First redundancy block output is used.
[4]
Micro-wire Voting Switch.
0 Enable. Circuit Redundancy Voting is active.
1 Disable. First Micro-wire block output is used.
[3]
Not Used.
[2]
Test Reset. Resets the test block when High, normal test block function
when Low. This bit is not self-clearing.
[1]
Test Mode Enable.
0 Disable.
1 Enable. Needed to run Test Pattern functions.
[0]
Not Used.
11 1110
Device ID
0100 1000
[7:0]
Device Revision ID. Engineering samples might be x01 or x47.



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