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TBD датащи(PDF) 67 Page - Freescale Semiconductor, Inc

номер детали TBD
подробное описание детали  Quad Core Digital Signal Processor
PDF  80 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

TBD датащи(HTML) 67 Page - Freescale Semiconductor, Inc

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Hardware Design Considerations
MSC8144E Quad Core Digital Signal Processor Data Sheet, Rev. 6
Freescale Semiconductor
67
3.4.1.2
16-Bit DDR Memory Only
Table 57 lists unused pin connection when using 16-bit DDR memory. The 16 most significant data lines are not used.
ECC_MDQS
NC
ECC_MDQS
NC
MVREF
GND
VDDDDR
GND
Note:
If the DDR controller is not used, disable the internal DDR clock by writing a 1 to the CLK11DIS bit in the System Clock Control
Register (SCCR[CLK!11DIS]). See Chapter 7, Clocks, in the MSC8144E Reference Manual for details.
Table 57. Connectivity of DDR Related Pins When Using 16-bit DDR Memory Only
Signal Name
Pin connection
MDQ[0–15]
in use
MDQ[16–31]
pull-up to VDDDDR
MDQS[0–1]
in use
MDQS[2–3]
pull-down to GND
MDQS[0–1]
in use
MDQS[2–3]
pull-up to VDDDDR
MA[0–15]
in use
MCK[0–2]
in use
MCK[0–2]
in use
MCS[0–1]
in use
MDM[0–1]
in use
MDM[2–3]
NC
MBA[0–2]
in use
MCAS
in use
MCKE[0–1]
in use
MODT[0–1]
in use
MDIC[0–1]
in use
MRAS
in use
MWE
in use
MVREF
1/2*VDDDDR
VDDDDR
2.5 V or 1.8 V
Table 56. Connectivity of DDR Related Pins When the DDR Interface Is Not Used (continued)
Signal Name
Pin Connection



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