AX88796BLF datasheet(17/82 Pages) ASIX

17 / 82 page

ASIX ELECTRONICS CORPORATION

AX88796BLF / AX88796BLI

Linking Buffers

Before the DMA can enter the next contiguous 256 bytes buffer, the address is checked for equality to PSTOP and

to the Boundary Pointer. If neither is reached, the DMA is allowed to use the next buffer.

Buffer Ring Overflow

If the Buffer Ring has been filled and the DMA reaches the Boundary Pointer Address, reception of the current

incoming packet will be discard by the AX88796B. Thus, the packets previously received and still contained in the

Ring will not be destroyed.

End Of Packet Operations

At the end of the packet the AX88796B determines whether the received packet is to be accepted or rejected. It

either branch to a routine to store the or to another routine that recovers the buffers used to store the packet.

If current of packet is accepted then AX88796B write two words of buffer header on receive buffer.

Buffer Header

Description

NPR, Status

D[15:8]: Next Page Pointer

D[7:6]: always zero

D[5]: multicast or broadcast

D[4]: runt packet

D[3]: MII error

D[2]: alignment error

D[1]: CRC error

D[0]: good packet

Length

D[15:11]: always zero

D[10:0]: packet length

Successful Reception

If the packet is successfully received as shown, the DMA is restored to the first buffer used to store the packet

(pointed to by the Current Page Register). The DMA then stores the Receive Status, a Pointer to where the next

packet will be stored and the number of received bytes. Note that the remaining bytes in the last buffer are discarded

and reception of the next packet begins on the next empty 256 byte buffer boundary. The Current Page Register is

then initialized to the next available buffer in the Buffer Ring. (The location of the next buffer had been previously

calculated and temporarily stored in an internal scratchpad register.)

Buffer Recovery For Rejected Packets

If the packet is a runt packet or contains CRC or Frame Alignment errors, it is rejected. The buffer management

logic resets the DMA back to the first buffer page used to store the packet (pointed to by CPR), recovering all

buffers that had been used to store the rejected packet. This operation will not be performed if the AX88796B is

programmed to accept either runt packets or packets with CRC or Frame Alignment errors. The received CRC is

always stored in buffer memory after the last byte of received data for the packet.

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