Bosch Sensortec

| BST-BMP585-DS003-02

6 | 71

© Bosch Sensortec GmbH 2023 | All rights reserved, also regarding any disposal, exploitation, reproduction, editing, distribution,

Document number: BST-BMP585-DS003-02

as well as in the event of applications for industrial property rights

List of figures

Figure 1: BMP585 block diagram........................................................................................................................................ 16

Figure 2: Power modes diagram......................................................................................................................................... 17

Figure 3: Step response at different IIR filter settings......................................................................................................... 21

Figure 4: Step response at different IIR filter settings on log scale and different threshold limits in dashed lines (3 dB, 90%,

95%, 99.5%, 100%) ............................................................................................................................................................ 22

Figure 5: INT pin timing in pulsed mode ............................................................................................................................. 27

Figure 6: INT pin timing in latched mode ............................................................................................................................ 28

Figure 7: SPI timing diagram (SPI4, Mode 0) ..................................................................................................................... 31

Figure 8: SPI single-byte write operation............................................................................................................................ 35

Figure 9: SPI burst write operation ..................................................................................................................................... 35

Figure 10: SPI single-byte read operation .......................................................................................................................... 35

Figure 11: SPI multi-byte read operation ............................................................................................................................ 36

Figure 12: SPI hybrid write-read burst ................................................................................................................................ 36

Figure 13: I²C single-byte write........................................................................................................................................... 37

Figure 14: I²C multi-byte write............................................................................................................................................. 38

Figure 15: I²C multi-byte read protocol with repeated start................................................................................................. 39

Figure 16: multi-byte read protocol with stop-start.............................................................................................................. 40

Figure 17: I²C multi-byte read from same start address with stop-start.............................................................................. 40

Figure 18: I3C address setting timing diagram................................................................................................................... 43

Figure 19: I3C SDR read timing diagram (single byte)....................................................................................................... 43

Figure 20: I3C SDR read timing diagram (multiple bytes) .................................................................................................. 43

Figure 21: I3C write timing diagram.................................................................................................................................... 44

Figure 22: Pin out bottom and top view .............................................................................................................................. 45

Figure 23: SPI 3-wire connection diagram.......................................................................................................................... 46

Figure 24: SPI 4-wire connection diagram.......................................................................................................................... 47

Figure 25: I²C connection diagram...................................................................................................................................... 47

Figure 26: I3C connection diagram..................................................................................................................................... 48

Figure 27: SPI/I²C/I3C Configuration with fast VDD, VDDIO ramp-up times...................................................................... 48

Figure 28: BMP585 top view............................................................................................................................................... 63

Figure 29: BMP585 bottom view......................................................................................................................................... 64

Figure 30: BMP585 side view ............................................................................................................................................. 65

List of tables

Table 1: Pressure Performance.......................................................................................................................................... 11

Table 2: Temperature Performance.................................................................................................................................... 12

Table 3: Mechanical characteristics.................................................................................................................................... 12

Table 4: Electrical characteristics ....................................................................................................................................... 12

Table 5: Interface pin electrical characteristics................................................................................................................... 15

Table 6: Absolute maximum ratings.................................................................................................................................... 15

Table 7: maximum nominal ODR setting per OSR settings in NORMAL mode ................................................................. 18

Table 8: Maximum nominal ODR setting per OSR settings in NORMAL mode for temperature only measurements....... 18

Table 9: Oversampling settings .......................................................................................................................................... 20

Table 10: IIR filter settings and bandwidth.......................................................................................................................... 22

Table 11: FIFO pressure and temperature frame (PT-frame)............................................................................................. 24

Table 12: FIFO temperature frame (T-frame) ..................................................................................................................... 24

Table 13: FIFO pressure frame (P-frame) .......................................................................................................................... 25

Table 14: FIFO empty frame............................................................................................................................................... 25

Table 15: Possible switches between interface modes ...................................................................................................... 30

Table 16: General interface parameters ............................................................................................................................. 30

Table 17: SPI timings.......................................................................................................................................................... 31

Table 18: Drive strength in IOH .......................................................................................................................................... 32

Table 19: Drive strengths for IOL........................................................................................................................................ 33

Table 20: SPI interface pin usage....................................................................................................................................... 34

Table 21: I3C provisional identifier...................................................................................................................................... 41

Table 22: I3C device characteristics register (DCR)........................................................................................................... 41

Table 23: I3C bus characteristics registers (BCR).............................................................................................................. 41

Table 24: Content of IBI mandatory byte and IBI payload byte.......................................................................................... 42