ACT5101 datasheet(21/59 Pages) QORVO

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Data Sheet Rev. E, November 2019 | Subject to change without notice

21 of 59

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ACT510x

23V Buck-Boost Converter with Integrated MOSFETs

Thermal Shutdown

The ACT510x has thermal shutdown protection that

disables the buck-boost converter when IC junction

temperature exceeds TSHUT (160°C). The fault register

TSD is set to 1 and latched when a TSD fault is detected.

The converter restarts automatically after the junction

temperature

falls

below

TSHUT

TSHUT_HYST,

approximately 160°C - 30°C = 130°C. After the system

restarts, the TSD bit is latched until it is read by I2C.

FET Over Current Protection

The ACT510x closely monitors the HSFETs and

LSFETs currents for safe operation. If any FET exceeds

the maximum cycle-by-cycle current limit threshold set

by I2C bit FET_ILIMIT in register 0x01h, the FET is

immediately turned off for that switching cycle. Three

thresholds of 5.7A, 8.5A, and 10A are available. If a FET

detects the current limit for eight continuous cycles, the

buck-boost converter is latched off.

After FET Overcurrent protection is triggered, there are

two ways to clear the fault to let the converter resume

normal

operation.

First

set

I2C

bit

DIS_OCP_SHUTDOWN = 1 in register 0x01h. It can

also be cleared by putting the IC into HIZ mode. Simply

toggle the EN pin low and back high.

Overcurrent protection can be disabled by setting the

I2C bit DIS_OCP_SHUTDOWN = 1.

Watchdog Timer

The ACT510x contains a watchdog timer to detect

system level communication failures. The watchdog

timer requires the host to periodically write a 1 into I2C

bit WATCHDOG_RESET in register 0x00h. If the host

latches up or is unable to perform the write command

before the watchdog timer times out, the IC enters

FAULT mode and disables the switching converter. The

timer resets after each write to WATCHDOG_RESET.

WATCHDOG_RESET is an auto-clearing register. It

automatically resets back to 0 after it is set to 1.

The timeout value is controlled by I2C bit WATCH-

DOG[1:0] in register 0x01h. It can be set between 80s

and 320s. If the IC is used in stand-alone operation, the

watchdog timer can be disabled by setting WATCH-

DOG[1:0] = 00.

WATCHDOG is always disabled in HIZ Mode and

cannot be enabled in HIZ. In addition, the timer is reset

to 0 when entering HIZ mode and automatically starts

counting when exiting HIZ mode.

CONVERTER OPERATION

Enable / Disable

The ACT510x is enabled and disabled from HIZ mode.

When enabled, the converter operates in the POWER

ON mode. When disabled, the IC operates in the HIZ

mode. The EN pin is the typical method to enable and

disable the IC. If I2C on/off control is required, the

system microprocessor can enable and disable the IC

via the EN and EN_OVERRIDE bits in register 0x0Eh.

Set EN_OVERRIDE = 1 to override the EN pin input.

Then set EN = 1 to enable the converter and set EN =

0 to disable the converter. Figure 7 shows both the

hardware and I2C conditions required to enter turn the

converter on.

Note that in all cases, the I2C bit HIZ in register 0x00h

must be = 0 to enter enable the converter. When HIZ =

1, the IC is forced into HIZ mode.

HIZ bit = 0

EN bit = 1

EN pin = 1

EN_OVERRIDE bit = 1

HIZ to

POWER ON

State

Figure 7: Conditions to Enter the POWER ON State

from the HIZ State

After the IC is enabled and in the POWER ON mode,

the conditions to exit POWER ON mode (disable the

converter) change. When the converter is disabled, the

IC state machine must go to HIZ mode. There are

several ways to transition from POWER ON mode to

HIZ mode.

Set the I2C HIZ bit = 1

Set the I2C EN bit = 0

Pull the EN pin LOW and set the I2C

EN_OVERRIDE bit = 0.

The IC also exits POWER ON mode if there is

an overvoltage condition for longer than 100ms.

HIZ bit = 1

EN bit = 0

EN pin = 0

EN_OVERRIDE bit = 0

POWER

ON State to

HIZ State

VOUT_OV bit = 1

100ms deglitch

Figure 8: Conditions to Enter HIZ State from

POWER ON State

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